BIT14             291 drivers/char/pcmcia/synclink_cs.c #define IRQ_DATAOVERRUN BIT14	// receive data overflow
BIT14             372 drivers/net/wireless/realtek/rtlwifi/rtl8192de/reg.h #define	RRSR_MCS2			BIT14
BIT14             723 drivers/scsi/lpfc/lpfc_hw4.h #define LPFC_SLI4_INTR14		BIT14
BIT14             117 drivers/staging/emxx_udc/emxx_udc.h #define UFRAME				(BIT14 + BIT13 + BIT12)
BIT14             146 drivers/staging/emxx_udc/emxx_udc.h #define EP6_INT				BIT14
BIT14             173 drivers/staging/emxx_udc/emxx_udc.h #define EP6_EN				BIT14
BIT14             214 drivers/staging/emxx_udc/emxx_udc.h #define EP0_OUT_NULL			BIT14
BIT14             396 drivers/staging/rtl8723bs/hal/Hal8723BReg.h #define	IMR_BCNDMAINT_E_8723B		BIT14	/*  Beacon DMA Interrupt Extension for Win7 */
BIT14             424 drivers/staging/rtl8723bs/hal/Hal8723BReg.h #define	IMR_BCNDOK1_8723B		BIT14	/*  Beacon Queue DMA OK Interrup 1 */
BIT14             436 drivers/staging/rtl8723bs/hal/odm.h 	ODM_BB_CFO_TRACKING		= BIT14,
BIT14             942 drivers/staging/rtl8723bs/hal/odm_DIG.c 		PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_CCK_FA_RST_11N, BIT14, 1);
BIT14              75 drivers/staging/rtl8723bs/hal/odm_debug.h #define ODM_COMP_MP					BIT14
BIT14             622 drivers/staging/rtl8723bs/include/hal_com_reg.h #define RRSR_MCS2				BIT14
BIT14             790 drivers/staging/rtl8723bs/include/hal_com_reg.h #define IMR_PSTIMEOUT			BIT14		/*  Power save time out interrupt */
BIT14             838 drivers/staging/rtl8723bs/include/hal_com_reg.h #define PHIMR_BCNDMAINT_E			BIT14
BIT14             889 drivers/staging/rtl8723bs/include/hal_com_reg.h #define UHIMR_BCNDMAINT_E			BIT14
BIT14             944 drivers/staging/rtl8723bs/include/hal_com_reg.h #define IMR_BCNDMAINT_E_88E		BIT14		/*  Beacon DMA Interrupt Extension for Win7 */
BIT14             973 drivers/staging/rtl8723bs/include/hal_com_reg.h #define IMR_BCNDOK1_88E			BIT14		/*  Beacon Queue DMA OK Interrup 1 */
BIT14            1037 drivers/staging/rtl8723bs/include/hal_com_reg.h #define RCR_HTC_LOC_CTRL		BIT14	/*  MFC<--HTC = 1 MFC-->HTC = 0 */
BIT14             214 drivers/staging/rtl8723bs/include/rtl8723b_spec.h #define	IMR_BCNDMAINT_E_8723B			BIT14		/*  Beacon DMA Interrupt Extension for Win7 */
BIT14             242 drivers/staging/rtl8723bs/include/rtl8723b_spec.h #define	IMR_BCNDOK1_8723B					BIT14		/*  Beacon Queue DMA OK Interrupt 1 */
BIT14              58 drivers/staging/rtl8723bs/include/rtw_mlme_ext.h #define DYNAMIC_BB_DYNAMIC_ATC		BIT14/* ODM_BB_DYNAMIC_ATC */
BIT14             558 drivers/tty/synclink.c #define MISCSTATUS_RXC			BIT14
BIT14             578 drivers/tty/synclink.c #define SICR_RXC_INACTIVE		BIT14
BIT14             579 drivers/tty/synclink.c #define SICR_RXC			(BIT15|BIT14)
BIT14            1839 drivers/tty/synclink.c 	usc_OutReg(info, PCR, (u16)((usc_InReg(info, PCR) | BIT15) | BIT14));
BIT14            4641 drivers/tty/synclink.c 			RegValue |= BIT14;
BIT14            4645 drivers/tty/synclink.c 			RegValue |= BIT15 | BIT14;
BIT14            4685 drivers/tty/synclink.c 	case HDLC_ENCODING_NRZI_MARK:          RegValue |= BIT14; break;
BIT14            4686 drivers/tty/synclink.c 	case HDLC_ENCODING_NRZI_SPACE:	       RegValue |= BIT14 | BIT13; break;
BIT14            4689 drivers/tty/synclink.c 	case HDLC_ENCODING_BIPHASE_LEVEL:      RegValue |= BIT15 | BIT14; break;
BIT14            4690 drivers/tty/synclink.c 	case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: RegValue |= BIT15 | BIT14 | BIT13; break;
BIT14            4760 drivers/tty/synclink.c 	case HDLC_ENCODING_NRZI_MARK:          RegValue |= BIT14; break;
BIT14            4761 drivers/tty/synclink.c 	case HDLC_ENCODING_NRZI_SPACE:         RegValue |= BIT14 | BIT13; break;
BIT14            4764 drivers/tty/synclink.c 	case HDLC_ENCODING_BIPHASE_LEVEL:      RegValue |= BIT15 | BIT14; break;
BIT14            4765 drivers/tty/synclink.c 	case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: RegValue |= BIT15 | BIT14 | BIT13; break;
BIT14            5823 drivers/tty/synclink.c 		RegValue |= BIT14;
BIT14             383 drivers/tty/synclink_gt.c #define MASK_BREAK   BIT14
BIT14             410 drivers/tty/synclink_gt.c #define RXIDLE      BIT14
BIT14             411 drivers/tty/synclink_gt.c #define RXBREAK     BIT14
BIT14            3977 drivers/tty/synclink_gt.c 		wr_reg16(info, SCR, (unsigned short)(rd_reg16(info, SCR) & ~BIT14));
BIT14            3985 drivers/tty/synclink_gt.c 		wr_reg16(info, SCR, (unsigned short)(rd_reg16(info, SCR) | BIT14));
BIT14            4212 drivers/tty/synclink_gt.c 	val = BIT15 + BIT14 + BIT0;
BIT14            4266 drivers/tty/synclink_gt.c 	case MGSL_MODE_MONOSYNC: val |= BIT14 + BIT13; break;
BIT14            4341 drivers/tty/synclink_gt.c 	case MGSL_MODE_MONOSYNC: val |= BIT14 + BIT13; break;
BIT14            4448 drivers/tty/synclink_gt.c 	wr_reg16(info, SCR, BIT15 + BIT14 + BIT0);