BIT13             292 drivers/char/pcmcia/synclink_cs.c #define IRQ_ALLSENT     BIT13	// all sent
BIT13             371 drivers/net/wireless/realtek/rtlwifi/rtl8192de/reg.h #define	RRSR_MCS1			BIT13
BIT13             722 drivers/scsi/lpfc/lpfc_hw4.h #define LPFC_SLI4_INTR13		BIT13
BIT13             117 drivers/staging/emxx_udc/emxx_udc.h #define UFRAME				(BIT14 + BIT13 + BIT12)
BIT13             147 drivers/staging/emxx_udc/emxx_udc.h #define EP5_INT				BIT13
BIT13             174 drivers/staging/emxx_udc/emxx_udc.h #define EP5_EN				BIT13
BIT13             215 drivers/staging/emxx_udc/emxx_udc.h #define EP0_OUT_FULL			BIT13
BIT13             377 drivers/staging/emxx_udc/emxx_udc.h #define AHB_VBUS_INT			BIT13		/* RW */
BIT13             387 drivers/staging/emxx_udc/emxx_udc.h #define VBUS_INTEN			BIT13		/* RW */
BIT13             425 drivers/staging/rtl8723bs/hal/Hal8723BReg.h #define	IMR_ATIMEND_E_8723B		BIT13	/*  ATIM Window End Extension for Win7 */
BIT13             435 drivers/staging/rtl8723bs/hal/odm.h 	ODM_BB_ADAPTIVITY		= BIT13,
BIT13              74 drivers/staging/rtl8723bs/hal/odm_debug.h #define ODM_COMP_RXHP				BIT13
BIT13             530 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 	rtw_write16(Adapter, REG_SYS_FUNC_EN, (u16)(RegVal|BIT13|BIT0|BIT1));
BIT13             621 drivers/staging/rtl8723bs/include/hal_com_reg.h #define RRSR_MCS1				BIT13
BIT13             791 drivers/staging/rtl8723bs/include/hal_com_reg.h #define IMR_BcnInt				BIT13		/*  Beacon DMA Interrupt 0 */
BIT13             839 drivers/staging/rtl8723bs/include/hal_com_reg.h #define PHIMR_ATIMEND_E			BIT13
BIT13             915 drivers/staging/rtl8723bs/include/hal_com_reg.h #define UHIMR_ATIMEND_E			BIT13
BIT13             974 drivers/staging/rtl8723bs/include/hal_com_reg.h #define IMR_ATIMEND_E_88E			BIT13		/*  ATIM Window End Extension for Win7 */
BIT13            1038 drivers/staging/rtl8723bs/include/hal_com_reg.h #define RCR_AMF					BIT13	/*  Accept management type frame */
BIT13             243 drivers/staging/rtl8723bs/include/rtl8723b_spec.h #define	IMR_ATIMEND_E_8723B				BIT13		/*  ATIM Window End Extension for Win7 */
BIT13              57 drivers/staging/rtl8723bs/include/rtw_mlme_ext.h #define DYNAMIC_BB_ADAPTIVITY		BIT13/* ODM_BB_ADAPTIVITY */
BIT13             559 drivers/tty/synclink.c #define MISCSTATUS_TXC_LATCHED		BIT13
BIT13             580 drivers/tty/synclink.c #define SICR_TXC_ACTIVE			BIT13
BIT13             582 drivers/tty/synclink.c #define SICR_TXC			(BIT13|BIT12)
BIT13            1175 drivers/tty/synclink.c 		info->cmr_value &= ~BIT13;
BIT13            1844 drivers/tty/synclink.c 	usc_OutReg(info, PCR, (u16)((usc_InReg(info, PCR) | BIT13) | BIT12));
BIT13            4620 drivers/tty/synclink.c 				(unsigned short)((usc_InReg(info, IOCR) & ~(BIT13|BIT12)) | BIT12));
BIT13            4649 drivers/tty/synclink.c 			RegValue |= BIT13;
BIT13            4684 drivers/tty/synclink.c 	case HDLC_ENCODING_NRZB:               RegValue |= BIT13; break;
BIT13            4686 drivers/tty/synclink.c 	case HDLC_ENCODING_NRZI_SPACE:	       RegValue |= BIT14 | BIT13; break;
BIT13            4688 drivers/tty/synclink.c 	case HDLC_ENCODING_BIPHASE_SPACE:      RegValue |= BIT15 | BIT13; break;
BIT13            4690 drivers/tty/synclink.c 	case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: RegValue |= BIT15 | BIT14 | BIT13; break;
BIT13            4759 drivers/tty/synclink.c 	case HDLC_ENCODING_NRZB:               RegValue |= BIT13; break;
BIT13            4761 drivers/tty/synclink.c 	case HDLC_ENCODING_NRZI_SPACE:         RegValue |= BIT14 | BIT13; break;
BIT13            4763 drivers/tty/synclink.c 	case HDLC_ENCODING_BIPHASE_SPACE:      RegValue |= BIT15 | BIT13; break;
BIT13            4765 drivers/tty/synclink.c 	case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: RegValue |= BIT15 | BIT14 | BIT13; break;
BIT13            5356 drivers/tty/synclink.c 		usc_OutReg( info, CCSR, (u16)(usc_InReg(info,CCSR) | BIT13) );
BIT13            5381 drivers/tty/synclink.c 		usc_OutReg( info, CCSR, (u16)(usc_InReg(info,CCSR) | BIT13) );
BIT13            5411 drivers/tty/synclink.c 	usc_OutReg( info, CCSR, (u16)(usc_InReg(info,CCSR) | BIT13) );
BIT13            5438 drivers/tty/synclink.c 	usc_OutReg( info, CCSR, (u16)(usc_InReg(info,CCSR) | BIT13) );
BIT13            6804 drivers/tty/synclink.c 	 	info->cmr_value |= BIT13;
BIT13            6942 drivers/tty/synclink.c 	usc_OutReg( info, PCR, (unsigned short)((usc_InReg(info, PCR) | BIT13) & ~BIT12) );
BIT13            7510 drivers/tty/synclink.c  	info->cmr_value &= ~BIT13;
BIT13            7539 drivers/tty/synclink.c 	info->cmr_value |= BIT13;
BIT13             412 drivers/tty/synclink_gt.c #define IRQ_TXDATA  BIT13
BIT13            4264 drivers/tty/synclink_gt.c 		val |= BIT15 + BIT13;
BIT13            4266 drivers/tty/synclink_gt.c 	case MGSL_MODE_MONOSYNC: val |= BIT14 + BIT13; break;
BIT13            4268 drivers/tty/synclink_gt.c 	case MGSL_MODE_RAW:      val |= BIT13; break;
BIT13            4339 drivers/tty/synclink_gt.c 		val |= BIT15 + BIT13;
BIT13            4341 drivers/tty/synclink_gt.c 	case MGSL_MODE_MONOSYNC: val |= BIT14 + BIT13; break;
BIT13            4343 drivers/tty/synclink_gt.c 	case MGSL_MODE_RAW:      val |= BIT13; break;