TS_INDEX2VAL 25 arch/sh/drivers/dma/dma-sh.c #define RS_DUAL (DM_INC | SM_INC | RS_AUTO | TS_INDEX2VAL(XMIT_SZ_32BIT)) TS_INDEX2VAL 30 arch/sh/kernel/cpu/sh4a/setup-sh7722.c .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL 35 arch/sh/kernel/cpu/sh4a/setup-sh7722.c .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL 40 arch/sh/kernel/cpu/sh4a/setup-sh7722.c .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL 45 arch/sh/kernel/cpu/sh4a/setup-sh7722.c .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL 50 arch/sh/kernel/cpu/sh4a/setup-sh7722.c .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL 55 arch/sh/kernel/cpu/sh4a/setup-sh7722.c .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL 60 arch/sh/kernel/cpu/sh4a/setup-sh7722.c .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT), TS_INDEX2VAL 65 arch/sh/kernel/cpu/sh4a/setup-sh7722.c .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT), TS_INDEX2VAL 70 arch/sh/kernel/cpu/sh4a/setup-sh7722.c .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT), TS_INDEX2VAL 75 arch/sh/kernel/cpu/sh4a/setup-sh7722.c .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT), TS_INDEX2VAL 80 arch/sh/kernel/cpu/sh4a/setup-sh7722.c .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_16BIT), TS_INDEX2VAL 85 arch/sh/kernel/cpu/sh4a/setup-sh7722.c .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_16BIT), TS_INDEX2VAL 36 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL 41 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL 46 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL 51 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL 56 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL 61 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL 66 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL 71 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL 76 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL 81 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL 86 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL 91 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL 96 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT), TS_INDEX2VAL 101 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT), TS_INDEX2VAL 106 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT), TS_INDEX2VAL 111 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT), TS_INDEX2VAL 116 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT), TS_INDEX2VAL 121 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT), TS_INDEX2VAL 126 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT), TS_INDEX2VAL 131 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT), TS_INDEX2VAL 136 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_16BIT), TS_INDEX2VAL 141 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_16BIT), TS_INDEX2VAL 146 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_16BIT), TS_INDEX2VAL 151 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_16BIT), TS_INDEX2VAL 121 arch/sh/kernel/cpu/sh4a/setup-sh7757.c TS_INDEX2VAL(XMIT_SZ_16BIT), TS_INDEX2VAL 128 arch/sh/kernel/cpu/sh4a/setup-sh7757.c TS_INDEX2VAL(XMIT_SZ_16BIT), TS_INDEX2VAL 135 arch/sh/kernel/cpu/sh4a/setup-sh7757.c TS_INDEX2VAL(XMIT_SZ_32BIT), TS_INDEX2VAL 142 arch/sh/kernel/cpu/sh4a/setup-sh7757.c TS_INDEX2VAL(XMIT_SZ_32BIT), TS_INDEX2VAL 152 arch/sh/kernel/cpu/sh4a/setup-sh7757.c TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL 159 arch/sh/kernel/cpu/sh4a/setup-sh7757.c TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL 166 arch/sh/kernel/cpu/sh4a/setup-sh7757.c TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL 173 arch/sh/kernel/cpu/sh4a/setup-sh7757.c TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL 180 arch/sh/kernel/cpu/sh4a/setup-sh7757.c TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL 187 arch/sh/kernel/cpu/sh4a/setup-sh7757.c TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL 194 arch/sh/kernel/cpu/sh4a/setup-sh7757.c TS_INDEX2VAL(XMIT_SZ_16BIT), TS_INDEX2VAL 201 arch/sh/kernel/cpu/sh4a/setup-sh7757.c TS_INDEX2VAL(XMIT_SZ_16BIT), TS_INDEX2VAL 211 arch/sh/kernel/cpu/sh4a/setup-sh7757.c TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL 218 arch/sh/kernel/cpu/sh4a/setup-sh7757.c TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL 225 arch/sh/kernel/cpu/sh4a/setup-sh7757.c TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL 232 arch/sh/kernel/cpu/sh4a/setup-sh7757.c TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL 239 arch/sh/kernel/cpu/sh4a/setup-sh7757.c TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL 246 arch/sh/kernel/cpu/sh4a/setup-sh7757.c TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL 253 arch/sh/kernel/cpu/sh4a/setup-sh7757.c TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL 260 arch/sh/kernel/cpu/sh4a/setup-sh7757.c TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL 267 arch/sh/kernel/cpu/sh4a/setup-sh7757.c TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL 274 arch/sh/kernel/cpu/sh4a/setup-sh7757.c TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL 284 arch/sh/kernel/cpu/sh4a/setup-sh7757.c TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL 291 arch/sh/kernel/cpu/sh4a/setup-sh7757.c TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL 298 arch/sh/kernel/cpu/sh4a/setup-sh7757.c TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL 305 arch/sh/kernel/cpu/sh4a/setup-sh7757.c TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL 312 arch/sh/kernel/cpu/sh4a/setup-sh7757.c TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL 319 arch/sh/kernel/cpu/sh4a/setup-sh7757.c TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL 326 arch/sh/kernel/cpu/sh4a/setup-sh7757.c TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL 333 arch/sh/kernel/cpu/sh4a/setup-sh7757.c TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL 340 arch/sh/kernel/cpu/sh4a/setup-sh7757.c TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL 347 arch/sh/kernel/cpu/sh4a/setup-sh7757.c TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL 45 drivers/dma/sh/shdma-arm.h #define CHCR_TX(xmit_sz) (DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL((xmit_sz))) TS_INDEX2VAL 46 drivers/dma/sh/shdma-arm.h #define CHCR_RX(xmit_sz) (DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL((xmit_sz)))