TRANSCODER_EDP   1803 drivers/gpu/drm/i915/display/intel_ddi.c 	if (cpu_transcoder == TRANSCODER_EDP) {
TRANSCODER_EDP   1931 drivers/gpu/drm/i915/display/intel_ddi.c 		cpu_transcoder = TRANSCODER_EDP;
TRANSCODER_EDP   1993 drivers/gpu/drm/i915/display/intel_ddi.c 		tmp = I915_READ(TRANS_DDI_FUNC_CTL(TRANSCODER_EDP));
TRANSCODER_EDP   2158 drivers/gpu/drm/i915/display/intel_ddi.c 	if (cpu_transcoder != TRANSCODER_EDP) {
TRANSCODER_EDP   2173 drivers/gpu/drm/i915/display/intel_ddi.c 	if (cpu_transcoder != TRANSCODER_EDP) {
TRANSCODER_EDP   3808 drivers/gpu/drm/i915/display/intel_ddi.c 	if (cpu_transcoder == TRANSCODER_EDP)
TRANSCODER_EDP   3984 drivers/gpu/drm/i915/display/intel_ddi.c 		pipe_config->cpu_transcoder = TRANSCODER_EDP;
TRANSCODER_EDP   3994 drivers/gpu/drm/i915/display/intel_ddi.c 	    pipe_config->cpu_transcoder == TRANSCODER_EDP)
TRANSCODER_EDP   6467 drivers/gpu/drm/i915/display/intel_display.c 	if (cpu_transcoder != TRANSCODER_EDP &&
TRANSCODER_EDP   7636 drivers/gpu/drm/i915/display/intel_display.c 		return transcoder == TRANSCODER_EDP;
TRANSCODER_EDP   8176 drivers/gpu/drm/i915/display/intel_display.c 	if (IS_HASWELL(dev_priv) && cpu_transcoder == TRANSCODER_EDP &&
TRANSCODER_EDP   10219 drivers/gpu/drm/i915/display/intel_display.c 		panel_transcoder_mask |= BIT(TRANSCODER_EDP);
TRANSCODER_EDP   10278 drivers/gpu/drm/i915/display/intel_display.c 	WARN_ON((enabled_panel_transcoders & BIT(TRANSCODER_EDP)) &&
TRANSCODER_EDP   10279 drivers/gpu/drm/i915/display/intel_display.c 		enabled_panel_transcoders != BIT(TRANSCODER_EDP));
TRANSCODER_EDP   10488 drivers/gpu/drm/i915/display/intel_display.c 	if (pipe_config->cpu_transcoder != TRANSCODER_EDP &&
TRANSCODER_EDP   17221 drivers/gpu/drm/i915/display/intel_display.c 		TRANSCODER_EDP,
TRANSCODER_EDP    129 drivers/gpu/drm/i915/display/intel_display.h 	case TRANSCODER_EDP:
TRANSCODER_EDP    120 drivers/gpu/drm/i915/display/intel_display_power.h 	((tran) == TRANSCODER_EDP ? POWER_DOMAIN_TRANSCODER_EDP : \
TRANSCODER_EDP    947 drivers/gpu/drm/i915/display/intel_panel.c 	if (cpu_transcoder == TRANSCODER_EDP)
TRANSCODER_EDP    317 drivers/gpu/drm/i915/display/intel_pipe_crc.c 	    pipe_config->cpu_transcoder == TRANSCODER_EDP)
TRANSCODER_EDP    103 drivers/gpu/drm/i915/display/intel_psr.c 	case TRANSCODER_EDP:
TRANSCODER_EDP    112 drivers/gpu/drm/i915/display/intel_psr.c 	u32 transcoders = BIT(TRANSCODER_EDP);
TRANSCODER_EDP    174 drivers/gpu/drm/i915/display/intel_psr.c 	u32 transcoders = BIT(TRANSCODER_EDP);
TRANSCODER_EDP    673 drivers/gpu/drm/i915/display/intel_psr.c 		[TRANSCODER_EDP] = CHICKEN_TRANS_EDP,
TRANSCODER_EDP   1235 drivers/gpu/drm/i915/display/intel_psr.c 	val &= EDP_PSR_ERROR(edp_psr_shift(TRANSCODER_EDP));
TRANSCODER_EDP    477 drivers/gpu/drm/i915/display/intel_vdsc.c 	else if (cpu_transcoder == TRANSCODER_EDP)
TRANSCODER_EDP    511 drivers/gpu/drm/i915/display/intel_vdsc.c 	if (cpu_transcoder == TRANSCODER_EDP) {
TRANSCODER_EDP    530 drivers/gpu/drm/i915/display/intel_vdsc.c 	if (cpu_transcoder == TRANSCODER_EDP) {
TRANSCODER_EDP    550 drivers/gpu/drm/i915/display/intel_vdsc.c 	if (cpu_transcoder == TRANSCODER_EDP) {
TRANSCODER_EDP    570 drivers/gpu/drm/i915/display/intel_vdsc.c 	if (cpu_transcoder == TRANSCODER_EDP) {
TRANSCODER_EDP    590 drivers/gpu/drm/i915/display/intel_vdsc.c 	if (cpu_transcoder == TRANSCODER_EDP) {
TRANSCODER_EDP    610 drivers/gpu/drm/i915/display/intel_vdsc.c 	if (cpu_transcoder == TRANSCODER_EDP) {
TRANSCODER_EDP    632 drivers/gpu/drm/i915/display/intel_vdsc.c 	if (cpu_transcoder == TRANSCODER_EDP) {
TRANSCODER_EDP    652 drivers/gpu/drm/i915/display/intel_vdsc.c 	if (cpu_transcoder == TRANSCODER_EDP) {
TRANSCODER_EDP    672 drivers/gpu/drm/i915/display/intel_vdsc.c 	if (cpu_transcoder == TRANSCODER_EDP) {
TRANSCODER_EDP    692 drivers/gpu/drm/i915/display/intel_vdsc.c 	if (cpu_transcoder == TRANSCODER_EDP) {
TRANSCODER_EDP    714 drivers/gpu/drm/i915/display/intel_vdsc.c 	if (cpu_transcoder == TRANSCODER_EDP) {
TRANSCODER_EDP    737 drivers/gpu/drm/i915/display/intel_vdsc.c 	if (cpu_transcoder == TRANSCODER_EDP) {
TRANSCODER_EDP    761 drivers/gpu/drm/i915/display/intel_vdsc.c 	if (cpu_transcoder == TRANSCODER_EDP) {
TRANSCODER_EDP    810 drivers/gpu/drm/i915/display/intel_vdsc.c 	if (cpu_transcoder == TRANSCODER_EDP) {
TRANSCODER_EDP    923 drivers/gpu/drm/i915/display/intel_vdsc.c 	if (crtc_state->cpu_transcoder == TRANSCODER_EDP) {
TRANSCODER_EDP    950 drivers/gpu/drm/i915/display/intel_vdsc.c 	if (old_crtc_state->cpu_transcoder == TRANSCODER_EDP) {
TRANSCODER_EDP   2117 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_D(HTOTAL(TRANSCODER_EDP), D_ALL);
TRANSCODER_EDP   2118 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_D(HBLANK(TRANSCODER_EDP), D_ALL);
TRANSCODER_EDP   2119 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_D(HSYNC(TRANSCODER_EDP), D_ALL);
TRANSCODER_EDP   2120 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_D(VTOTAL(TRANSCODER_EDP), D_ALL);
TRANSCODER_EDP   2121 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_D(VBLANK(TRANSCODER_EDP), D_ALL);
TRANSCODER_EDP   2122 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_D(VSYNC(TRANSCODER_EDP), D_ALL);
TRANSCODER_EDP   2123 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_D(BCLRPAT(TRANSCODER_EDP), D_ALL);
TRANSCODER_EDP   2124 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_D(VSYNCSHIFT(TRANSCODER_EDP), D_ALL);
TRANSCODER_EDP   2153 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_D(PIPE_DATA_M1(TRANSCODER_EDP), D_ALL);
TRANSCODER_EDP   2154 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_D(PIPE_DATA_N1(TRANSCODER_EDP), D_ALL);
TRANSCODER_EDP   2155 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_D(PIPE_DATA_M2(TRANSCODER_EDP), D_ALL);
TRANSCODER_EDP   2156 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_D(PIPE_DATA_N2(TRANSCODER_EDP), D_ALL);
TRANSCODER_EDP   2157 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_D(PIPE_LINK_M1(TRANSCODER_EDP), D_ALL);
TRANSCODER_EDP   2158 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_D(PIPE_LINK_N1(TRANSCODER_EDP), D_ALL);
TRANSCODER_EDP   2159 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_D(PIPE_LINK_M2(TRANSCODER_EDP), D_ALL);
TRANSCODER_EDP   2160 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_D(PIPE_LINK_N2(TRANSCODER_EDP), D_ALL);
TRANSCODER_EDP   2154 drivers/gpu/drm/i915/i915_drv.h #define HAS_TRANSCODER_EDP(dev_priv)	 (INTEL_INFO(dev_priv)->trans_offsets[TRANSCODER_EDP] != 0)
TRANSCODER_EDP     75 drivers/gpu/drm/i915/i915_pci.c 		[TRANSCODER_EDP] = PIPE_EDP_OFFSET, \
TRANSCODER_EDP     81 drivers/gpu/drm/i915/i915_pci.c 		[TRANSCODER_EDP] = TRANSCODER_EDP_OFFSET, \
TRANSCODER_EDP    739 drivers/gpu/drm/i915/i915_pci.c 		[TRANSCODER_EDP] = PIPE_EDP_OFFSET, \
TRANSCODER_EDP    747 drivers/gpu/drm/i915/i915_pci.c 		[TRANSCODER_EDP] = TRANSCODER_EDP_OFFSET, \