TMU2               47 arch/sh/kernel/cpu/sh3/setup-sh7705.c 	INTC_VECT(TMU2, 0x440), INTC_VECT(TMU2, 0x460),
TMU2               55 arch/sh/kernel/cpu/sh3/setup-sh7705.c 	{ 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
TMU2               36 arch/sh/kernel/cpu/sh3/setup-sh770x.c 	INTC_VECT(TMU2, 0x440), INTC_VECT(TMU2, 0x460),
TMU2               67 arch/sh/kernel/cpu/sh3/setup-sh770x.c 	{ 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
TMU2               49 arch/sh/kernel/cpu/sh3/setup-sh7710.c 	INTC_VECT(TMU2, 0x440),
TMU2               57 arch/sh/kernel/cpu/sh3/setup-sh7710.c 	{ 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
TMU2              238 arch/sh/kernel/cpu/sh3/setup-sh7720.c 	INTC_VECT(TMU2, 0x440),       INTC_VECT(RTC, 0x480),
TMU2              266 arch/sh/kernel/cpu/sh3/setup-sh7720.c 	{ 0xA414FEE2UL, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
TMU2               94 arch/sh/kernel/cpu/sh4/setup-sh4-202.c 	INTC_VECT(TMU2, 0x440), INTC_VECT(TMU2, 0x460),
TMU2              103 arch/sh/kernel/cpu/sh4/setup-sh4-202.c 	{ 0xffd00004, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
TMU2              193 arch/sh/kernel/cpu/sh4/setup-sh7750.c 	INTC_VECT(TMU2, 0x440), INTC_VECT(TMU2, 0x460),
TMU2              205 arch/sh/kernel/cpu/sh4/setup-sh7750.c 	{ 0xffd00004, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
TMU2               72 arch/sh/kernel/cpu/sh4/setup-sh7760.c 	INTC_VECT(TMU2, 0x440), INTC_VECT(TMU2, 0x460),
TMU2              103 arch/sh/kernel/cpu/sh4/setup-sh7760.c 	{ 0xffd00004, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2 } },
TMU2              362 arch/sh/kernel/cpu/sh4a/setup-sh7343.c 	INTC_VECT(TMU2, 0x440),
TMU2              387 arch/sh/kernel/cpu/sh4a/setup-sh7343.c 	  { 0, TMU2, TMU1, TMU0, JPU, 0, 0, LCDC } },
TMU2              408 arch/sh/kernel/cpu/sh4a/setup-sh7343.c 	{ 0xa4080000, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2 } },
TMU2              300 arch/sh/kernel/cpu/sh4a/setup-sh7366.c 	INTC_VECT(TMU2, 0x440),
TMU2              324 arch/sh/kernel/cpu/sh4a/setup-sh7366.c 	  { 0, TMU2, TMU1, TMU0, VEU2, 0, 0, LCDC } },
TMU2              345 arch/sh/kernel/cpu/sh4a/setup-sh7366.c 	{ 0xa4080000, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2 } },
TMU2              575 arch/sh/kernel/cpu/sh4a/setup-sh7722.c 	INTC_VECT(TMU2, 0x440), INTC_VECT(IRDA, 0x480),
TMU2              601 arch/sh/kernel/cpu/sh4a/setup-sh7722.c 	  { 0, TMU2, TMU1, TMU0, JPU, 0, 0, LCDC } },
TMU2              622 arch/sh/kernel/cpu/sh4a/setup-sh7722.c 	{ 0xa4080000, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, IRDA } },
TMU2              847 arch/sh/kernel/cpu/sh4a/setup-sh7757.c 	INTC_VECT(TMU2, 0x5c0), INTC_VECT(TMU2_TICPI, 0x5e0),
TMU2              945 arch/sh/kernel/cpu/sh4a/setup-sh7757.c 	INTC_GROUP(TMU012, TMU0, TMU1, TMU2, TMU2_TICPI),
TMU2             1060 arch/sh/kernel/cpu/sh4a/setup-sh7757.c 	{ INT2PRI0, 0, 32, 8, { TMU0, TMU1, TMU2, TMU2_TICPI } },
TMU2              256 arch/sh/kernel/cpu/sh4a/setup-sh7763.c 	INTC_VECT(TMU1, 0x5a0), INTC_VECT(TMU2, 0x5c0),
TMU2              296 arch/sh/kernel/cpu/sh4a/setup-sh7763.c 	INTC_GROUP(TMU012, TMU0, TMU1, TMU2, TMU2_TICPI),
TMU2              315 arch/sh/kernel/cpu/sh4a/setup-sh7763.c 						 TMU2, TMU2_TICPI } },
TMU2              359 arch/sh/kernel/cpu/sh4a/setup-sh7770.c 	INTC_VECT(TMU2, 0x440), INTC_VECT(TMU2_TICPI, 0x460),
TMU2              406 arch/sh/kernel/cpu/sh4a/setup-sh7770.c 	INTC_GROUP(TMU, TMU0, TMU1, TMU2, TMU2_TICPI, TMU3, TMU4, TMU5,
TMU2              443 arch/sh/kernel/cpu/sh4a/setup-sh7770.c 	  { TMU1, TMU2, TMU2_TICPI, TMU3 } },
TMU2              318 arch/sh/kernel/cpu/sh4a/setup-sh7780.c 	INTC_VECT(TMU2, 0x5c0), INTC_VECT(TMU2_TICPI, 0x5e0),
TMU2              350 arch/sh/kernel/cpu/sh4a/setup-sh7780.c 	INTC_GROUP(TMU012, TMU0, TMU1, TMU2, TMU2_TICPI),
TMU2              364 arch/sh/kernel/cpu/sh4a/setup-sh7780.c 						 TMU2, TMU2_TICPI } },
TMU2              394 arch/sh/kernel/cpu/sh4a/setup-sh7785.c 	INTC_VECT(TMU2, 0x5c0), INTC_VECT(TMU2_TICPI, 0x5e0),
TMU2              433 arch/sh/kernel/cpu/sh4a/setup-sh7785.c 	INTC_GROUP(TMU012, TMU0, TMU1, TMU2, TMU2_TICPI),
TMU2              462 arch/sh/kernel/cpu/sh4a/setup-sh7785.c 						 TMU2, TMU2_TICPI } },
TMU2              521 arch/sh/kernel/cpu/sh4a/setup-sh7786.c 	INTC_VECT(TMU2, 0x7a0), INTC_VECT(TMU3, 0x7c0),
TMU2              594 arch/sh/kernel/cpu/sh4a/setup-sh7786.c 	    TMU2, TMU3, 0, }, INTC_SMP_BALANCING(INT2DISTCR1) },
TMU2              631 arch/sh/kernel/cpu/sh4a/setup-sh7786.c 	{ 0xfe410820, 0, 32, 8, /* INT2PRI8 */ { SCIF1, TMU2, TMU3, 0 } },
TMU2              197 arch/sh/kernel/cpu/sh4a/setup-shx3.c 	INTC_VECT(TMU2, 0x440), INTC_VECT(TMU3, 0x460),
TMU2              268 arch/sh/kernel/cpu/sh4a/setup-shx3.c 	    0, TMU5, TMU4, TMU3, TMU2, TMU1, TMU0, 0, },
TMU2              291 arch/sh/kernel/cpu/sh4a/setup-shx3.c 						 TMU3, TMU2, TMU1, TMU0 } },