TMU1_TUNI2        555 arch/sh/kernel/cpu/sh4a/setup-sh7723.c 	INTC_VECT(TMU1_TUNI2,0x960),
TMU1_TUNI2        573 arch/sh/kernel/cpu/sh4a/setup-sh7723.c 	  { 0, TMU1_TUNI2, TMU1_TUNI1, TMU1_TUNI0,
TMU1_TUNI2        608 arch/sh/kernel/cpu/sh4a/setup-sh7723.c 	{ 0xa4080008, 0, 16, 4, /* IPRC */ { TMU1_TUNI0, TMU1_TUNI1, TMU1_TUNI2, 0} },
TMU1_TUNI2        996 arch/sh/kernel/cpu/sh4a/setup-sh7724.c 	INTC_VECT(TMU1_TUNI2, 0x960),
TMU1_TUNI2       1016 arch/sh/kernel/cpu/sh4a/setup-sh7724.c 	  { 0, TMU1_TUNI2, TMU1_TUNI1, TMU1_TUNI0,
TMU1_TUNI2       1060 arch/sh/kernel/cpu/sh4a/setup-sh7724.c 					     TMU1_TUNI2, SPU } },