TMU0               46 arch/sh/kernel/cpu/sh3/setup-sh7705.c 	INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
TMU0               55 arch/sh/kernel/cpu/sh3/setup-sh7705.c 	{ 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
TMU0               35 arch/sh/kernel/cpu/sh3/setup-sh770x.c 	INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
TMU0               67 arch/sh/kernel/cpu/sh3/setup-sh770x.c 	{ 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
TMU0               48 arch/sh/kernel/cpu/sh3/setup-sh7710.c 	INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
TMU0               57 arch/sh/kernel/cpu/sh3/setup-sh7710.c 	{ 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
TMU0              237 arch/sh/kernel/cpu/sh3/setup-sh7720.c 	INTC_VECT(TMU0, 0x400),       INTC_VECT(TMU1, 0x420),
TMU0              266 arch/sh/kernel/cpu/sh3/setup-sh7720.c 	{ 0xA414FEE2UL, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
TMU0               93 arch/sh/kernel/cpu/sh4/setup-sh4-202.c 	INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
TMU0              103 arch/sh/kernel/cpu/sh4/setup-sh4-202.c 	{ 0xffd00004, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
TMU0              192 arch/sh/kernel/cpu/sh4/setup-sh7750.c 	INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
TMU0              205 arch/sh/kernel/cpu/sh4/setup-sh7750.c 	{ 0xffd00004, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
TMU0               71 arch/sh/kernel/cpu/sh4/setup-sh7760.c 	INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
TMU0              103 arch/sh/kernel/cpu/sh4/setup-sh7760.c 	{ 0xffd00004, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2 } },
TMU0              361 arch/sh/kernel/cpu/sh4a/setup-sh7343.c 	INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
TMU0              387 arch/sh/kernel/cpu/sh4a/setup-sh7343.c 	  { 0, TMU2, TMU1, TMU0, JPU, 0, 0, LCDC } },
TMU0              408 arch/sh/kernel/cpu/sh4a/setup-sh7343.c 	{ 0xa4080000, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2 } },
TMU0              299 arch/sh/kernel/cpu/sh4a/setup-sh7366.c 	INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
TMU0              324 arch/sh/kernel/cpu/sh4a/setup-sh7366.c 	  { 0, TMU2, TMU1, TMU0, VEU2, 0, 0, LCDC } },
TMU0              345 arch/sh/kernel/cpu/sh4a/setup-sh7366.c 	{ 0xa4080000, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2 } },
TMU0              574 arch/sh/kernel/cpu/sh4a/setup-sh7722.c 	INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
TMU0              601 arch/sh/kernel/cpu/sh4a/setup-sh7722.c 	  { 0, TMU2, TMU1, TMU0, JPU, 0, 0, LCDC } },
TMU0              622 arch/sh/kernel/cpu/sh4a/setup-sh7722.c 	{ 0xa4080000, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, IRDA } },
TMU0              846 arch/sh/kernel/cpu/sh4a/setup-sh7757.c 	INTC_VECT(TMU0, 0x580), INTC_VECT(TMU1, 0x5a0),
TMU0              945 arch/sh/kernel/cpu/sh4a/setup-sh7757.c 	INTC_GROUP(TMU012, TMU0, TMU1, TMU2, TMU2_TICPI),
TMU0             1060 arch/sh/kernel/cpu/sh4a/setup-sh7757.c 	{ INT2PRI0, 0, 32, 8, { TMU0, TMU1, TMU2, TMU2_TICPI } },
TMU0              255 arch/sh/kernel/cpu/sh4a/setup-sh7763.c 	INTC_VECT(WDT, 0x560), INTC_VECT(TMU0, 0x580),
TMU0              296 arch/sh/kernel/cpu/sh4a/setup-sh7763.c 	INTC_GROUP(TMU012, TMU0, TMU1, TMU2, TMU2_TICPI),
TMU0              314 arch/sh/kernel/cpu/sh4a/setup-sh7763.c 	{ 0xffd40000, 0, 32, 8, /* INT2PRI0 */ { TMU0, TMU1,
TMU0              358 arch/sh/kernel/cpu/sh4a/setup-sh7770.c 	INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
TMU0              406 arch/sh/kernel/cpu/sh4a/setup-sh7770.c 	INTC_GROUP(TMU, TMU0, TMU1, TMU2, TMU2_TICPI, TMU3, TMU4, TMU5,
TMU0              428 arch/sh/kernel/cpu/sh4a/setup-sh7770.c 	{ 0xffe00000, 0, 32, 8, /* INT2PRI0 */ { GPIO, TMU0, 0, HAC } },
TMU0              317 arch/sh/kernel/cpu/sh4a/setup-sh7780.c 	INTC_VECT(TMU0, 0x580), INTC_VECT(TMU1, 0x5a0),
TMU0              350 arch/sh/kernel/cpu/sh4a/setup-sh7780.c 	INTC_GROUP(TMU012, TMU0, TMU1, TMU2, TMU2_TICPI),
TMU0              363 arch/sh/kernel/cpu/sh4a/setup-sh7780.c 	{ 0xffd40000, 0, 32, 8, /* INT2PRI0 */ { TMU0, TMU1,
TMU0              393 arch/sh/kernel/cpu/sh4a/setup-sh7785.c 	INTC_VECT(TMU0, 0x580), INTC_VECT(TMU1, 0x5a0),
TMU0              433 arch/sh/kernel/cpu/sh4a/setup-sh7785.c 	INTC_GROUP(TMU012, TMU0, TMU1, TMU2, TMU2_TICPI),
TMU0              461 arch/sh/kernel/cpu/sh4a/setup-sh7785.c 	{ 0xffd40000, 0, 32, 8, /* INT2PRI0 */ { TMU0, TMU1,
TMU0              196 arch/sh/kernel/cpu/sh4a/setup-shx3.c 	INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
TMU0              268 arch/sh/kernel/cpu/sh4a/setup-shx3.c 	    0, TMU5, TMU4, TMU3, TMU2, TMU1, TMU0, 0, },
TMU0              291 arch/sh/kernel/cpu/sh4a/setup-shx3.c 						 TMU3, TMU2, TMU1, TMU0 } },