TLB_V4_U_PAGE      69 arch/arm/include/asm/tlbflush.h #define v4_tlb_flags	(TLB_V4_U_FULL | TLB_V4_U_PAGE)
TLB_V4_U_PAGE      85 arch/arm/include/asm/tlbflush.h 			 TLB_V4_U_FULL | TLB_V4_U_PAGE)
TLB_V4_U_PAGE     427 arch/arm/include/asm/tlbflush.h 	if (possible_tlb_flags & (TLB_V4_U_PAGE|TLB_V4_D_PAGE|TLB_V4_I_PAGE|TLB_V4_I_FULL) &&
TLB_V4_U_PAGE     429 arch/arm/include/asm/tlbflush.h 		tlb_op(TLB_V4_U_PAGE, "c8, c7, 1", uaddr);
TLB_V4_U_PAGE     484 arch/arm/include/asm/tlbflush.h 	tlb_op(TLB_V4_U_PAGE, "c8, c7, 1", kaddr);