TIMER_CTL_REG 60 drivers/clocksource/timer-sun4i.c u32 val = readl(base + TIMER_CTL_REG(timer)); TIMER_CTL_REG 61 drivers/clocksource/timer-sun4i.c writel(val & ~TIMER_CTL_ENABLE, base + TIMER_CTL_REG(timer)); TIMER_CTL_REG 74 drivers/clocksource/timer-sun4i.c u32 val = readl(base + TIMER_CTL_REG(timer)); TIMER_CTL_REG 82 drivers/clocksource/timer-sun4i.c base + TIMER_CTL_REG(timer)); TIMER_CTL_REG 181 drivers/clocksource/timer-sun4i.c timer_of_base(&to) + TIMER_CTL_REG(1)); TIMER_CTL_REG 203 drivers/clocksource/timer-sun4i.c timer_of_base(&to) + TIMER_CTL_REG(0)); TIMER_CTL_REG 83 drivers/clocksource/timer-sun5i.c u32 val = readl(ce->timer.base + TIMER_CTL_REG(timer)); TIMER_CTL_REG 84 drivers/clocksource/timer-sun5i.c writel(val & ~TIMER_CTL_ENABLE, ce->timer.base + TIMER_CTL_REG(timer)); TIMER_CTL_REG 96 drivers/clocksource/timer-sun5i.c u32 val = readl(ce->timer.base + TIMER_CTL_REG(timer)); TIMER_CTL_REG 104 drivers/clocksource/timer-sun5i.c ce->timer.base + TIMER_CTL_REG(timer)); TIMER_CTL_REG 224 drivers/clocksource/timer-sun5i.c base + TIMER_CTL_REG(1));