TF 461 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_TF(b, c, v) SET_CONTEXT_FIELD(b, c, FSR, TF, v) TF 649 drivers/iommu/msm_iommu_hw-8xxx.h #define GET_TF(b, c) GET_CONTEXT_FIELD(b, c, FSR, TF) TF 79 drivers/iommu/mtk_iommu_v1.c #define MT2701_M4U_TF_LARB(TF) (6 - (((TF) >> 13) & 0x7)) TF 80 drivers/iommu/mtk_iommu_v1.c #define MT2701_M4U_TF_PORT(TF) (((TF) >> 8) & 0xF) TF 63 drivers/mtd/nand/raw/omap2.c #define P2048e(a) (TF(a & NAND_Ecc_P2048e) << 0) TF 64 drivers/mtd/nand/raw/omap2.c #define P2048o(a) (TF(a & NAND_Ecc_P2048o) << 1) TF 65 drivers/mtd/nand/raw/omap2.c #define P1e(a) (TF(a & NAND_Ecc_P1e) << 2) TF 66 drivers/mtd/nand/raw/omap2.c #define P1o(a) (TF(a & NAND_Ecc_P1o) << 3) TF 67 drivers/mtd/nand/raw/omap2.c #define P2e(a) (TF(a & NAND_Ecc_P2e) << 4) TF 68 drivers/mtd/nand/raw/omap2.c #define P2o(a) (TF(a & NAND_Ecc_P2o) << 5) TF 69 drivers/mtd/nand/raw/omap2.c #define P4e(a) (TF(a & NAND_Ecc_P4e) << 6) TF 70 drivers/mtd/nand/raw/omap2.c #define P4o(a) (TF(a & NAND_Ecc_P4o) << 7) TF 72 drivers/mtd/nand/raw/omap2.c #define P8e(a) (TF(a & NAND_Ecc_P8e) << 0) TF 73 drivers/mtd/nand/raw/omap2.c #define P8o(a) (TF(a & NAND_Ecc_P8o) << 1) TF 74 drivers/mtd/nand/raw/omap2.c #define P16e(a) (TF(a & NAND_Ecc_P16e) << 2) TF 75 drivers/mtd/nand/raw/omap2.c #define P16o(a) (TF(a & NAND_Ecc_P16o) << 3) TF 76 drivers/mtd/nand/raw/omap2.c #define P32e(a) (TF(a & NAND_Ecc_P32e) << 4) TF 77 drivers/mtd/nand/raw/omap2.c #define P32o(a) (TF(a & NAND_Ecc_P32o) << 5) TF 78 drivers/mtd/nand/raw/omap2.c #define P64e(a) (TF(a & NAND_Ecc_P64e) << 6) TF 79 drivers/mtd/nand/raw/omap2.c #define P64o(a) (TF(a & NAND_Ecc_P64o) << 7) TF 81 drivers/mtd/nand/raw/omap2.c #define P128e(a) (TF(a & NAND_Ecc_P128e) << 0) TF 82 drivers/mtd/nand/raw/omap2.c #define P128o(a) (TF(a & NAND_Ecc_P128o) << 1) TF 83 drivers/mtd/nand/raw/omap2.c #define P256e(a) (TF(a & NAND_Ecc_P256e) << 2) TF 84 drivers/mtd/nand/raw/omap2.c #define P256o(a) (TF(a & NAND_Ecc_P256o) << 3) TF 85 drivers/mtd/nand/raw/omap2.c #define P512e(a) (TF(a & NAND_Ecc_P512e) << 4) TF 86 drivers/mtd/nand/raw/omap2.c #define P512o(a) (TF(a & NAND_Ecc_P512o) << 5) TF 87 drivers/mtd/nand/raw/omap2.c #define P1024e(a) (TF(a & NAND_Ecc_P1024e) << 6) TF 88 drivers/mtd/nand/raw/omap2.c #define P1024o(a) (TF(a & NAND_Ecc_P1024o) << 7) TF 90 drivers/mtd/nand/raw/omap2.c #define P8e_s(a) (TF(a & NAND_Ecc_P8e) << 0) TF 91 drivers/mtd/nand/raw/omap2.c #define P8o_s(a) (TF(a & NAND_Ecc_P8o) << 1) TF 92 drivers/mtd/nand/raw/omap2.c #define P16e_s(a) (TF(a & NAND_Ecc_P16e) << 2) TF 93 drivers/mtd/nand/raw/omap2.c #define P16o_s(a) (TF(a & NAND_Ecc_P16o) << 3) TF 94 drivers/mtd/nand/raw/omap2.c #define P1e_s(a) (TF(a & NAND_Ecc_P1e) << 4) TF 95 drivers/mtd/nand/raw/omap2.c #define P1o_s(a) (TF(a & NAND_Ecc_P1o) << 5) TF 96 drivers/mtd/nand/raw/omap2.c #define P2e_s(a) (TF(a & NAND_Ecc_P2e) << 6) TF 97 drivers/mtd/nand/raw/omap2.c #define P2o_s(a) (TF(a & NAND_Ecc_P2o) << 7) TF 99 drivers/mtd/nand/raw/omap2.c #define P4e_s(a) (TF(a & NAND_Ecc_P4e) << 0) TF 100 drivers/mtd/nand/raw/omap2.c #define P4o_s(a) (TF(a & NAND_Ecc_P4o) << 1) TF 423 fs/isofs/rock.c if (rr->u.TF.flags & TF_CREATE) { TF 425 fs/isofs/rock.c iso_date(rr->u.TF.times[cnt++].time, TF 429 fs/isofs/rock.c if (rr->u.TF.flags & TF_MODIFY) { TF 431 fs/isofs/rock.c iso_date(rr->u.TF.times[cnt++].time, TF 435 fs/isofs/rock.c if (rr->u.TF.flags & TF_ACCESS) { TF 437 fs/isofs/rock.c iso_date(rr->u.TF.times[cnt++].time, TF 441 fs/isofs/rock.c if (rr->u.TF.flags & TF_ATTRIBUTES) { TF 443 fs/isofs/rock.c iso_date(rr->u.TF.times[cnt++].time, TF 111 fs/isofs/rock.h struct RR_TF_s TF; TF 7847 net/core/filter.c #define SOCK_ADDR_STORE_NESTED_FIELD_OFF(S, NS, F, NF, SIZE, OFF, TF) \ TF 7855 net/core/filter.c offsetof(S, TF)); \ TF 7863 net/core/filter.c offsetof(S, TF)); \ TF 7867 net/core/filter.c TF) \ TF 7871 net/core/filter.c OFF, TF); \ TF 7878 net/core/filter.c #define SOCK_ADDR_LOAD_OR_STORE_NESTED_FIELD(S, NS, F, NF, TF) \ TF 7880 net/core/filter.c S, NS, F, NF, BPF_FIELD_SIZEOF(NS, NF), 0, TF)