TEGRA20_I2S_FIFO_SCR_FIFO1_ATN_LVL_SHIFT  135 sound/soc/tegra/tegra20_i2s.h #define TEGRA20_I2S_FIFO_SCR_FIFO1_ATN_LVL_MASK		(3 << TEGRA20_I2S_FIFO_SCR_FIFO1_ATN_LVL_SHIFT)
TEGRA20_I2S_FIFO_SCR_FIFO1_ATN_LVL_SHIFT  136 sound/soc/tegra/tegra20_i2s.h #define TEGRA20_I2S_FIFO_SCR_FIFO1_ATN_LVL_ONE_SLOT	(TEGRA20_I2S_FIFO_ATN_LVL_ONE_SLOT     << TEGRA20_I2S_FIFO_SCR_FIFO1_ATN_LVL_SHIFT)
TEGRA20_I2S_FIFO_SCR_FIFO1_ATN_LVL_SHIFT  137 sound/soc/tegra/tegra20_i2s.h #define TEGRA20_I2S_FIFO_SCR_FIFO1_ATN_LVL_FOUR_SLOTS	(TEGRA20_I2S_FIFO_ATN_LVL_FOUR_SLOTS   << TEGRA20_I2S_FIFO_SCR_FIFO1_ATN_LVL_SHIFT)
TEGRA20_I2S_FIFO_SCR_FIFO1_ATN_LVL_SHIFT  138 sound/soc/tegra/tegra20_i2s.h #define TEGRA20_I2S_FIFO_SCR_FIFO1_ATN_LVL_EIGHT_SLOTS	(TEGRA20_I2S_FIFO_ATN_LVL_EIGHT_SLOTS  << TEGRA20_I2S_FIFO_SCR_FIFO1_ATN_LVL_SHIFT)
TEGRA20_I2S_FIFO_SCR_FIFO1_ATN_LVL_SHIFT  139 sound/soc/tegra/tegra20_i2s.h #define TEGRA20_I2S_FIFO_SCR_FIFO1_ATN_LVL_TWELVE_SLOTS	(TEGRA20_I2S_FIFO_ATN_LVL_TWELVE_SLOTS << TEGRA20_I2S_FIFO_SCR_FIFO1_ATN_LVL_SHIFT)