TEGRA20_AC97_FIFO_TX1  252 sound/soc/tegra/tegra20_ac97.c 	case TEGRA20_AC97_FIFO_TX1:
TEGRA20_AC97_FIFO_TX1  267 sound/soc/tegra/tegra20_ac97.c 	case TEGRA20_AC97_FIFO_TX1:
TEGRA20_AC97_FIFO_TX1  280 sound/soc/tegra/tegra20_ac97.c 	case TEGRA20_AC97_FIFO_TX1:
TEGRA20_AC97_FIFO_TX1  364 sound/soc/tegra/tegra20_ac97.c 	ac97->playback_dma_data.addr = mem->start + TEGRA20_AC97_FIFO_TX1;