TEGRA20_AC97_FIFO_RX1  253 sound/soc/tegra/tegra20_ac97.c 	case TEGRA20_AC97_FIFO_RX1:
TEGRA20_AC97_FIFO_RX1  268 sound/soc/tegra/tegra20_ac97.c 	case TEGRA20_AC97_FIFO_RX1:
TEGRA20_AC97_FIFO_RX1  281 sound/soc/tegra/tegra20_ac97.c 	case TEGRA20_AC97_FIFO_RX1:
TEGRA20_AC97_FIFO_RX1  294 sound/soc/tegra/tegra20_ac97.c 	.max_register = TEGRA20_AC97_FIFO_RX1,
TEGRA20_AC97_FIFO_RX1  360 sound/soc/tegra/tegra20_ac97.c 	ac97->capture_dma_data.addr = mem->start + TEGRA20_AC97_FIFO_RX1;