TCON_CH1_SCLK2_DIV_MASK  178 drivers/clk/sunxi/clk-sun4i-tcon-ch1.c 	parent_rate /= (reg & TCON_CH1_SCLK2_DIV_MASK) + 1;
TCON_CH1_SCLK2_DIV_MASK  199 drivers/clk/sunxi/clk-sun4i-tcon-ch1.c 	reg &= ~(TCON_CH1_SCLK2_DIV_MASK | TCON_CH1_SCLK1_HALF_BIT);
TCON_CH1_SCLK2_DIV_MASK  200 drivers/clk/sunxi/clk-sun4i-tcon-ch1.c 	reg |= (div_m - 1) & TCON_CH1_SCLK2_DIV_MASK;