T3 388 arch/mips/kvm/entry.c UASM_i_ADDU(&p, T3, T1, T2); T3 389 arch/mips/kvm/entry.c UASM_i_LW(&p, K0, 0, T3); T3 395 arch/mips/kvm/entry.c uasm_i_addiu(&p, T3, ZERO, sizeof(struct cpuinfo_mips)/sizeof(long)); T3 396 arch/mips/kvm/entry.c uasm_i_mul(&p, T2, T2, T3); T3 481 arch/mips/mm/page.c build_copy_load(&buf, T3, off + 3 * copy_word_size); T3 489 arch/mips/mm/page.c build_copy_store(&buf, T3, off + 3 * copy_word_size); T3 503 arch/mips/mm/page.c build_copy_load(&buf, T3, off + 3 * copy_word_size); T3 513 arch/mips/mm/page.c build_copy_store(&buf, T3, off + 3 * copy_word_size); T3 526 arch/mips/mm/page.c build_copy_load(&buf, T3, off + 3 * copy_word_size); T3 534 arch/mips/mm/page.c build_copy_store(&buf, T3, off + 3 * copy_word_size); T3 544 arch/mips/mm/page.c build_copy_load(&buf, T3, off + 3 * copy_word_size); T3 555 arch/mips/mm/page.c build_copy_store(&buf, T3, off + 3 * copy_word_size); T3 568 arch/mips/mm/page.c build_copy_load(&buf, T3, off + 3 * copy_word_size); T3 572 arch/mips/mm/page.c build_copy_store(&buf, T3, off + 3 * copy_word_size); T3 582 arch/mips/mm/page.c build_copy_load(&buf, T3, off + 3 * copy_word_size); T3 589 arch/mips/mm/page.c build_copy_store(&buf, T3, off + 3 * copy_word_size); T3 253 crypto/anubis.c static const u32 T3[256] = { T3 545 crypto/anubis.c inter[i] ^= T3[(kappa[j ] ) & 0xff]; T3 567 crypto/anubis.c T3[T4[(v ) & 0xff] & 0xff]; T3 599 crypto/anubis.c T3[(state[3] >> 24) ] ^ T3 605 crypto/anubis.c T3[(state[3] >> 16) & 0xff] ^ T3 611 crypto/anubis.c T3[(state[3] >> 8) & 0xff] ^ T3 617 crypto/anubis.c T3[(state[3] ) & 0xff] ^ T3 633 crypto/anubis.c (T3[(state[3] >> 24) ] & 0x000000ffU) ^ T3 639 crypto/anubis.c (T3[(state[3] >> 16) & 0xff] & 0x000000ffU) ^ T3 645 crypto/anubis.c (T3[(state[3] >> 8) & 0xff] & 0x000000ffU) ^ T3 651 crypto/anubis.c (T3[(state[3] ) & 0xff] & 0x000000ffU) ^ T3 305 crypto/khazad.c static const u64 T3[256] = { T3 774 crypto/khazad.c T3[(int)(K1 >> 32) & 0xff] ^ T3 790 crypto/khazad.c T3[(int)S[(int)(K1 >> 32) & 0xff] & 0xff] ^ T3 816 crypto/khazad.c T3[(int)(state >> 32) & 0xff] ^ T3 827 crypto/khazad.c (T3[(int)(state >> 32) & 0xff] & 0x000000ff00000000ULL) ^ T3 45 drivers/block/drbd/drbd_state.h #define NS3(T1, S1, T2, S2, T3, S3) \ T3 47 drivers/block/drbd/drbd_state.h mask.T2 = T2##_MASK; mask.T3 = T3##_MASK; mask; }), \ T3 49 drivers/block/drbd/drbd_state.h val.T2 = (S2); val.T3 = (S3); val; }) T3 56 drivers/block/drbd/drbd_state.h #define _NS3(D, T1, S1, T2, S2, T3, S3) \ T3 58 drivers/block/drbd/drbd_state.h __ns.T2 = (S2); __ns.T3 = (S3); __ns; }) T3 59 drivers/iio/pressure/bmp280-core.c s16 T3; T3 169 drivers/iio/pressure/bmp280-core.c calib->T3 = le16_to_cpu(t_buf[T3]); T3 287 drivers/iio/pressure/bmp280-core.c ((s32)calib->T3)) >> 14; T3 2698 drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c #define TL(s, v) T3("lu", s, v) T3 2225 drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c #define T(s, v) T3("lu", s, v) T3 638 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c SIG_EXPR_LIST_DECL_SINGLE(T3, DDCDAT, DDCDAT, SIG_DESC_SET(SCU84, 15)); T3 639 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c SIG_EXPR_LIST_DECL_SINGLE(T3, DASHT3, DASHT3, SIG_DESC_SET(SCU94, 9)); T3 640 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c PIN_DECL_2(T3, GPIOJ7, DDCDAT, DASHT3); T3 641 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c FUNC_GROUP_DECL(DDCDAT, T3); T3 2093 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c ASPEED_PINCTRL_PIN(T3), T3 2529 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c { PIN_CONFIG_BIAS_PULL_DOWN, { R2, T3 }, SCU8C, 25 }, T3 2530 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c { PIN_CONFIG_BIAS_DISABLE, { R2, T3 }, SCU8C, 25 }, T3 609 lib/crypto/des.c #define DES_PC2(a, b, c, d) (T4(d) | T3(c) | T2(b) | T1(a)) T3 49 tools/perf/arch/riscv/util/unwind-libdw.c dwarf_regs[28] = REG(T3);