T1                347 arch/mips/kvm/entry.c 		uasm_i_ext(&p, T1, T0, MIPS_GCTL1_ID_SHIFT,
T1                349 arch/mips/kvm/entry.c 		uasm_i_ins(&p, T0, T1, MIPS_GCTL1_RID_SHIFT,
T1                365 arch/mips/kvm/entry.c 	UASM_i_ADDIU(&p, T1, S0,
T1                375 arch/mips/kvm/entry.c 	 UASM_i_ADDIU(&p, T1, K1, offsetof(struct kvm_vcpu_arch,
T1                378 arch/mips/kvm/entry.c 	UASM_i_ADDIU(&p, T1, K1, offsetof(struct kvm_vcpu_arch,
T1                388 arch/mips/kvm/entry.c 	UASM_i_ADDU(&p, T3, T1, T2);
T1                414 arch/mips/kvm/entry.c 			  (int)offsetof(struct mm_struct, context.asid), T1);
T1                477 arch/mips/mm/page.c 		build_copy_load(&buf, T1, off + copy_word_size);
T1                485 arch/mips/mm/page.c 		build_copy_store(&buf, T1, off + copy_word_size);
T1                499 arch/mips/mm/page.c 		build_copy_load(&buf, T1, off + copy_word_size);
T1                507 arch/mips/mm/page.c 		build_copy_store(&buf, T1, off + copy_word_size);
T1                524 arch/mips/mm/page.c 			build_copy_load(&buf, T1, off + copy_word_size);
T1                530 arch/mips/mm/page.c 			build_copy_store(&buf, T1, off + copy_word_size);
T1                542 arch/mips/mm/page.c 			build_copy_load(&buf, T1, off + copy_word_size);
T1                548 arch/mips/mm/page.c 			build_copy_store(&buf, T1, off + copy_word_size);
T1                566 arch/mips/mm/page.c 			build_copy_load(&buf, T1, off + copy_word_size);
T1                570 arch/mips/mm/page.c 			build_copy_store(&buf, T1, off + copy_word_size);
T1                580 arch/mips/mm/page.c 			build_copy_load(&buf, T1, off + copy_word_size);
T1                584 arch/mips/mm/page.c 			build_copy_store(&buf, T1, off + copy_word_size);
T1                119 crypto/anubis.c static const u32 T1[256] = {
T1                539 crypto/anubis.c 			inter[i] ^= T1[(kappa[j--] >> 16) & 0xff];
T1                565 crypto/anubis.c 				T1[T4[(v >> 16) & 0xff] & 0xff] ^
T1                597 crypto/anubis.c 			T1[(state[1] >> 24)       ] ^
T1                603 crypto/anubis.c 			T1[(state[1] >> 16) & 0xff] ^
T1                609 crypto/anubis.c 			T1[(state[1] >>  8) & 0xff] ^
T1                615 crypto/anubis.c 			T1[(state[1]      ) & 0xff] ^
T1                631 crypto/anubis.c 		(T1[(state[1] >> 24)       ] & 0x00ff0000U) ^
T1                637 crypto/anubis.c 		(T1[(state[1] >> 16) & 0xff] & 0x00ff0000U) ^
T1                643 crypto/anubis.c 		(T1[(state[1] >>  8) & 0xff] & 0x00ff0000U) ^
T1                649 crypto/anubis.c 		(T1[(state[1]      ) & 0xff] & 0x00ff0000U) ^
T1                127 crypto/khazad.c static const u64 T1[256] = {
T1                772 crypto/khazad.c 			    T1[(int)(K1 >> 48) & 0xff] ^
T1                788 crypto/khazad.c 			    T1[(int)S[(int)(K1 >> 48) & 0xff] & 0xff] ^
T1                814 crypto/khazad.c 			T1[(int)(state >> 48) & 0xff] ^
T1                825 crypto/khazad.c 		(T1[(int)(state >> 48) & 0xff] & 0x00ff000000000000ULL) ^
T1                 40 drivers/block/drbd/drbd_state.h #define NS2(T1, S1, T2, S2) \
T1                 41 drivers/block/drbd/drbd_state.h 	({ union drbd_state mask; mask.i = 0; mask.T1 = T1##_MASK; \
T1                 43 drivers/block/drbd/drbd_state.h 	({ union drbd_state val; val.i = 0; val.T1 = (S1); \
T1                 45 drivers/block/drbd/drbd_state.h #define NS3(T1, S1, T2, S2, T3, S3) \
T1                 46 drivers/block/drbd/drbd_state.h 	({ union drbd_state mask; mask.i = 0; mask.T1 = T1##_MASK; \
T1                 48 drivers/block/drbd/drbd_state.h 	({ union drbd_state val;  val.i = 0; val.T1 = (S1); \
T1                 53 drivers/block/drbd/drbd_state.h #define _NS2(D, T1, S1, T2, S2) \
T1                 54 drivers/block/drbd/drbd_state.h 	D, ({ union drbd_state __ns; __ns = drbd_read_state(D); __ns.T1 = (S1); \
T1                 56 drivers/block/drbd/drbd_state.h #define _NS3(D, T1, S1, T2, S2, T3, S3) \
T1                 57 drivers/block/drbd/drbd_state.h 	D, ({ union drbd_state __ns; __ns = drbd_read_state(D); __ns.T1 = (S1); \
T1                 57 drivers/iio/pressure/bmp280-core.c 	u16 T1;
T1                167 drivers/iio/pressure/bmp280-core.c 	calib->T1 = le16_to_cpu(t_buf[T1]);
T1                283 drivers/iio/pressure/bmp280-core.c 	var1 = (((adc_temp >> 3) - ((s32)calib->T1 << 1)) *
T1                285 drivers/iio/pressure/bmp280-core.c 	var2 = (((((adc_temp >> 4) - ((s32)calib->T1)) *
T1                286 drivers/iio/pressure/bmp280-core.c 		  ((adc_temp >> 4) - ((s32)calib->T1))) >> 12) *
T1               1697 drivers/net/wan/farsync.c 		if (info->framing == T1)
T1               1890 drivers/net/wan/farsync.c 		FST_WRW(card, portConfig[i].lineInterface, T1);
T1               1891 drivers/net/wan/farsync.c 		port->hwif = T1;
T1               1937 drivers/net/wan/farsync.c 	case T1:
T1                637 drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c SSSF_PIN_DECL(T1, GPIOJ7, DDCDAT, SIG_DESC_SET(SCU84, 15));
T1               2085 drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c 	ASPEED_PINCTRL_PIN(T1),
T1               2458 drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c 	{ PIN_CONFIG_BIAS_PULL_DOWN, { J5,  T1  }, SCU8C, 25 },
T1               2459 drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c 	{ PIN_CONFIG_BIAS_DISABLE,   { J5,  T1  }, SCU8C, 25 },
T1                702 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c SIG_EXPR_LIST_DECL_SINGLE(T1, VPIDE, VPI24, VPI_24_RSVD_DESC, T1_DESC, COND2);
T1                703 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c SIG_EXPR_LIST_DECL_SINGLE(T1, NDCD1, NDCD1, T1_DESC, COND2);
T1                704 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c PIN_DECL_2(T1, GPIOL1, VPIDE, NDCD1);
T1                705 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c FUNC_GROUP_DECL(NDCD1, T1);
T1                929 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c FUNC_GROUP_DECL(VPI24, T1, U2, P4, P3, Y1, AB2, AA1, Y2, AA2, P5, R5, T5, V3,
T1               2086 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c 	ASPEED_PINCTRL_PIN(T1),
T1               2211 drivers/tty/n_gsm.c 	gsm->t1 = T1;
T1                323 kernel/trace/trace_irqsoff.c 	u64 T0, T1, delta;
T1                328 kernel/trace/trace_irqsoff.c 	T1 = ftrace_now(cpu);
T1                329 kernel/trace/trace_irqsoff.c 	delta = T1-T0;
T1                435 kernel/trace/trace_sched_wakeup.c 	u64 T0, T1, delta;
T1                481 kernel/trace/trace_sched_wakeup.c 	T1 = ftrace_now(cpu);
T1                482 kernel/trace/trace_sched_wakeup.c 	delta = T1-T0;
T1                609 lib/crypto/des.c #define DES_PC2(a, b, c, d) (T4(d) | T3(c) | T2(b) | T1(a))
T1                 27 tools/perf/arch/riscv/util/unwind-libdw.c 	dwarf_regs[6]  = REG(T1);
T1                302 tools/perf/builtin-sched.c 	u64 T0 = get_nsecs(), T1;
T1                305 tools/perf/builtin-sched.c 		T1 = get_nsecs();
T1                306 tools/perf/builtin-sched.c 	} while (T1 + sched->run_measurement_overhead < T0 + nsecs);
T1                321 tools/perf/builtin-sched.c 	u64 T0, T1, delta, min_delta = NSEC_PER_SEC;
T1                327 tools/perf/builtin-sched.c 		T1 = get_nsecs();
T1                328 tools/perf/builtin-sched.c 		delta = T1-T0;
T1                338 tools/perf/builtin-sched.c 	u64 T0, T1, delta, min_delta = NSEC_PER_SEC;
T1                344 tools/perf/builtin-sched.c 		T1 = get_nsecs();
T1                345 tools/perf/builtin-sched.c 		delta = T1-T0;
T1                745 tools/perf/builtin-sched.c 	u64 T0, T1, delta, avg_delta, fluct;
T1                749 tools/perf/builtin-sched.c 	T1 = get_nsecs();
T1                751 tools/perf/builtin-sched.c 	delta = T1 - T0;
T1                791 tools/perf/builtin-sched.c 	u64 T0, T1;
T1                795 tools/perf/builtin-sched.c 	T1 = get_nsecs();
T1                797 tools/perf/builtin-sched.c 	printf("the run test took %" PRIu64 " nsecs\n", T1 - T0);
T1                801 tools/perf/builtin-sched.c 	T1 = get_nsecs();
T1                803 tools/perf/builtin-sched.c 	printf("the sleep test took %" PRIu64 " nsecs\n", T1 - T0);