T0 305 arch/mips/kvm/entry.c UASM_i_LW(&p, T0, offsetof(struct kvm_vcpu_arch, pc), K1); T0 306 arch/mips/kvm/entry.c UASM_i_MTC0(&p, T0, C0_EPC); T0 345 arch/mips/kvm/entry.c uasm_i_mfc0(&p, T0, C0_GUESTCTL1); T0 347 arch/mips/kvm/entry.c uasm_i_ext(&p, T1, T0, MIPS_GCTL1_ID_SHIFT, T0 349 arch/mips/kvm/entry.c uasm_i_ins(&p, T0, T1, MIPS_GCTL1_RID_SHIFT, T0 351 arch/mips/kvm/entry.c uasm_i_mtc0(&p, T0, C0_GUESTCTL1); T0 369 arch/mips/kvm/entry.c UASM_i_LW(&p, T0, offsetof(struct kvm_vcpu_arch, cop0), K1); T0 370 arch/mips/kvm/entry.c UASM_i_LW(&p, T0, offsetof(struct mips_coproc, reg[MIPS_CP0_STATUS][0]), T0 371 arch/mips/kvm/entry.c T0); T0 372 arch/mips/kvm/entry.c uasm_i_andi(&p, T0, T0, KSU_USER | ST0_ERL | ST0_EXL); T0 373 arch/mips/kvm/entry.c uasm_i_xori(&p, T0, T0, KSU_USER); T0 374 arch/mips/kvm/entry.c uasm_il_bnez(&p, &r, T0, label_kernel_asid); T0 616 arch/mips/kvm/entry.c uasm_i_mfhi(&p, T0); T0 617 arch/mips/kvm/entry.c UASM_i_SW(&p, T0, offsetof(struct kvm_vcpu_arch, hi), K1); T0 619 arch/mips/kvm/entry.c uasm_i_mflo(&p, T0); T0 620 arch/mips/kvm/entry.c UASM_i_SW(&p, T0, offsetof(struct kvm_vcpu_arch, lo), K1); T0 625 arch/mips/kvm/entry.c UASM_i_MFC0(&p, T0, scratch_tmp[0], scratch_tmp[1]); T0 626 arch/mips/kvm/entry.c UASM_i_SW(&p, T0, offsetof(struct kvm_vcpu_arch, gprs[K1]), K1); T0 687 arch/mips/kvm/entry.c uasm_i_cfc1(&p, T0, 31); T0 688 arch/mips/kvm/entry.c uasm_i_sw(&p, T0, offsetof(struct kvm_vcpu_arch, fpu.fcr31), T0 699 arch/mips/kvm/entry.c uasm_i_mfc0(&p, T0, C0_CONFIG5); T0 700 arch/mips/kvm/entry.c uasm_i_ext(&p, T0, T0, 27, 1); /* MIPS_CONF5_MSAEN */ T0 701 arch/mips/kvm/entry.c uasm_il_beqz(&p, &r, T0, label_msa_1); T0 703 arch/mips/kvm/entry.c uasm_i_cfcmsa(&p, T0, MSA_CSR); T0 704 arch/mips/kvm/entry.c uasm_i_sw(&p, T0, offsetof(struct kvm_vcpu_arch, fpu.msacsr), T0 748 arch/mips/kvm/entry.c uasm_i_mfc0(&p, T0, C0_GUESTCTL1); T0 750 arch/mips/kvm/entry.c uasm_i_ins(&p, T0, ZERO, MIPS_GCTL1_RID_SHIFT, T0 752 arch/mips/kvm/entry.c uasm_i_mtc0(&p, T0, C0_GUESTCTL1); T0 845 arch/mips/kvm/entry.c uasm_i_andi(&p, T0, V0, RESUME_HOST); T0 846 arch/mips/kvm/entry.c uasm_il_bnez(&p, &r, T0, label_return_to_host); T0 876 arch/mips/kvm/entry.c UASM_i_LW(&p, T0, offsetof(struct kvm_vcpu_arch, guest_ebase), K1); T0 884 arch/mips/kvm/entry.c build_set_exc_base(&p, T0); T0 475 arch/mips/mm/page.c build_copy_load(&buf, T0, off); T0 483 arch/mips/mm/page.c build_copy_store(&buf, T0, off); T0 497 arch/mips/mm/page.c build_copy_load(&buf, T0, off); T0 505 arch/mips/mm/page.c build_copy_store(&buf, T0, off); T0 523 arch/mips/mm/page.c build_copy_load(&buf, T0, off); T0 528 arch/mips/mm/page.c build_copy_store(&buf, T0, off); T0 541 arch/mips/mm/page.c build_copy_load(&buf, T0, off); T0 546 arch/mips/mm/page.c build_copy_store(&buf, T0, off); T0 565 arch/mips/mm/page.c build_copy_load(&buf, T0, off); T0 569 arch/mips/mm/page.c build_copy_store(&buf, T0, off); T0 579 arch/mips/mm/page.c build_copy_load(&buf, T0, off); T0 583 arch/mips/mm/page.c build_copy_store(&buf, T0, off); T0 52 crypto/anubis.c static const u32 T0[256] = { T0 536 crypto/anubis.c inter[i] = T0[(kappa[j--] >> 24) ]; T0 564 crypto/anubis.c T0[T4[(v >> 24) ] & 0xff] ^ T0 596 crypto/anubis.c T0[(state[0] >> 24) ] ^ T0 602 crypto/anubis.c T0[(state[0] >> 16) & 0xff] ^ T0 608 crypto/anubis.c T0[(state[0] >> 8) & 0xff] ^ T0 614 crypto/anubis.c T0[(state[0] ) & 0xff] ^ T0 630 crypto/anubis.c (T0[(state[0] >> 24) ] & 0xff000000U) ^ T0 636 crypto/anubis.c (T0[(state[0] >> 16) & 0xff] & 0xff000000U) ^ T0 642 crypto/anubis.c (T0[(state[0] >> 8) & 0xff] & 0xff000000U) ^ T0 648 crypto/anubis.c (T0[(state[0] ) & 0xff] & 0xff000000U) ^ T0 38 crypto/khazad.c static const u64 T0[256] = { T0 771 crypto/khazad.c ctx->E[r] = T0[(int)(K1 >> 56) ] ^ T0 787 crypto/khazad.c ctx->D[r] = T0[(int)S[(int)(K1 >> 56) ] & 0xff] ^ T0 813 crypto/khazad.c state = T0[(int)(state >> 56) ] ^ T0 824 crypto/khazad.c state = (T0[(int)(state >> 56) ] & 0xff00000000000000ULL) ^ T0 224 drivers/ata/pata_octeon_cf.c unsigned int T0, Tkr, Td; T0 231 drivers/ata/pata_octeon_cf.c T0 = timing->cycle; T0 247 drivers/ata/pata_octeon_cf.c oe_n = max(T0 - oe_a, Tkr); T0 2600 drivers/gpu/drm/amd/amdgpu/si_dpm.c dte_tables->T0 = cpu_to_be32(dte_data->t0); T0 374 drivers/gpu/drm/amd/amdgpu/sislands_smc.h uint32_t T0; T0 2504 drivers/gpu/drm/radeon/si_dpm.c dte_tables->T0 = cpu_to_be32(dte_data->t0); T0 374 drivers/gpu/drm/radeon/sislands_smc.h uint32_t T0; T0 323 kernel/trace/trace_irqsoff.c u64 T0, T1, delta; T0 327 kernel/trace/trace_irqsoff.c T0 = data->preempt_timestamp; T0 329 kernel/trace/trace_irqsoff.c delta = T1-T0; T0 435 kernel/trace/trace_sched_wakeup.c u64 T0, T1, delta; T0 480 kernel/trace/trace_sched_wakeup.c T0 = data->preempt_timestamp; T0 482 kernel/trace/trace_sched_wakeup.c delta = T1-T0; T0 26 tools/perf/arch/riscv/util/unwind-libdw.c dwarf_regs[5] = REG(T0); T0 302 tools/perf/builtin-sched.c u64 T0 = get_nsecs(), T1; T0 306 tools/perf/builtin-sched.c } while (T1 + sched->run_measurement_overhead < T0 + nsecs); T0 321 tools/perf/builtin-sched.c u64 T0, T1, delta, min_delta = NSEC_PER_SEC; T0 325 tools/perf/builtin-sched.c T0 = get_nsecs(); T0 328 tools/perf/builtin-sched.c delta = T1-T0; T0 338 tools/perf/builtin-sched.c u64 T0, T1, delta, min_delta = NSEC_PER_SEC; T0 342 tools/perf/builtin-sched.c T0 = get_nsecs(); T0 345 tools/perf/builtin-sched.c delta = T1-T0; T0 745 tools/perf/builtin-sched.c u64 T0, T1, delta, avg_delta, fluct; T0 747 tools/perf/builtin-sched.c T0 = get_nsecs(); T0 751 tools/perf/builtin-sched.c delta = T1 - T0; T0 791 tools/perf/builtin-sched.c u64 T0, T1; T0 793 tools/perf/builtin-sched.c T0 = get_nsecs(); T0 797 tools/perf/builtin-sched.c printf("the run test took %" PRIu64 " nsecs\n", T1 - T0); T0 799 tools/perf/builtin-sched.c T0 = get_nsecs(); T0 803 tools/perf/builtin-sched.c printf("the sleep test took %" PRIu64 " nsecs\n", T1 - T0);