SZ_8K              30 arch/arm/mach-cns3xxx/core.c 		.length		= SZ_8K,
SZ_8K             538 arch/arm/mach-davinci/board-da830-evm.c 		.size = SZ_8K,
SZ_8K             544 arch/arm/mach-davinci/board-da830-evm.c 		.size = SZ_16K + SZ_8K,
SZ_8K             767 arch/arm/mach-davinci/board-da850-evm.c 	.sram_size_playback	= SZ_8K,
SZ_8K             768 arch/arm/mach-davinci/board-da850-evm.c 	.sram_size_capture	= SZ_8K,
SZ_8K             716 arch/arm/mach-davinci/da830.c 		.end		= DA8XX_CP_INTC_BASE + SZ_8K - 1,
SZ_8K             637 arch/arm/mach-davinci/da850.c 		.end		= DA8XX_CP_INTC_BASE + SZ_8K - 1,
SZ_8K              57 arch/arm/mach-davinci/devices-da8xx.c #define DA8XX_EMAC_CTRL_RAM_SIZE	SZ_8K
SZ_8K             304 arch/arm/mach-davinci/dm355.c 		.end	= DAVINCI_ASP1_BASE + SZ_8K - 1,
SZ_8K             548 arch/arm/mach-davinci/dm365.c 		.end	= DAVINCI_DM365_ASP0_BASE + SZ_8K - 1,
SZ_8K             292 arch/arm/mach-davinci/dm644x.c 		.end	= DAVINCI_ASP0_BASE + SZ_8K - 1,
SZ_8K              53 arch/arm/mach-davinci/include/mach/da8xx.h #define DA8XX_CP_INTC_SIZE	SZ_8K
SZ_8K              27 arch/arm/mach-imx/devices/platform-imx21-hcd.c 			.end = data->iobase + SZ_8K - 1,
SZ_8K              46 arch/arm/mach-imx/devices/platform-mxc_nand.c 	imx_mxc_nand_data_entry_single(MX35, "imx25-nand", SZ_8K);
SZ_8K              70 arch/arm/mach-omap1/board-palmtt.c 		.size		= SZ_8K,
SZ_8K              75 arch/arm/mach-omap1/board-palmtt.c 		.offset		= SZ_8K,
SZ_8K              76 arch/arm/mach-omap1/board-palmtt.c 		.size		= 7 * SZ_8K,
SZ_8K              82 arch/arm/mach-omap1/board-palmtt.c 		.size		= 8 * SZ_8K,
SZ_8K              88 arch/arm/mach-omap1/board-palmtt.c 		.size		= 7 * SZ_1M + 4 * SZ_64K - 16 * SZ_8K,
SZ_8K             181 arch/arm/mach-orion5x/common.c 			  SZ_8K, IRQ_ORION5X_CESA);
SZ_8K              52 arch/arm/mach-orion5x/orion5x.h #define ORION5X_SRAM_SIZE		SZ_8K
SZ_8K             408 arch/arm/mach-pxa/mioa701.c 	.end   = PXA_CS0_PHYS + SZ_8K - 1,
SZ_8K             444 arch/arm/mach-sa1100/assabet.c 	DEFINE_RES_MEM(0x40000000, SZ_8K),
SZ_8K             223 arch/arm/mach-sa1100/collie.c 	[0] = DEFINE_RES_MEM(0x40000000, SZ_8K),
SZ_8K             230 arch/arm/mach-sa1100/neponset.c 		DEFINE_RES_MEM(0x40000000, SZ_8K),
SZ_8K              20 arch/arm/mach-tegra/iomap.h #define TEGRA_ARM_PERIF_SIZE		SZ_8K
SZ_8K             241 arch/arm/mm/cache-l2x0.c 	.way_size_0 = SZ_8K,
SZ_8K             406 arch/arm/mm/cache-l2x0.c 	.way_size_0 = SZ_8K,
SZ_8K             762 arch/arm/mm/cache-l2x0.c 	.way_size_0 = SZ_8K,
SZ_8K            1088 arch/arm/mm/cache-l2x0.c 	.way_size_0 = SZ_8K,
SZ_8K            1108 arch/arm/mm/cache-l2x0.c 	.way_size_0 = SZ_8K,
SZ_8K            1295 arch/arm/mm/cache-l2x0.c 	.way_size_0 = SZ_8K,
SZ_8K            1325 arch/arm/mm/cache-l2x0.c 	.way_size_0 = SZ_8K,
SZ_8K            1688 arch/arm/mm/cache-l2x0.c 	.way_size_0 = SZ_8K,
SZ_8K            1727 arch/arm/mm/cache-l2x0.c 	.way_size_0 = SZ_8K,
SZ_8K              12 arch/nds32/include/asm/shmparam.h #define	SHMLBA	(4 * SZ_8K)	/* attach addr a multiple of this */
SZ_8K             370 drivers/gpu/drm/exynos/exynos_drm_rotator.c 	{ IPP_SIZE_LIMIT(BUFFER, .h = { 8, SZ_8K }, .v = { 8, SZ_8K }) },
SZ_8K             375 drivers/gpu/drm/exynos/exynos_drm_rotator.c 	{ IPP_SIZE_LIMIT(BUFFER, .h = { 8, SZ_8K }, .v = { 8, SZ_8K }) },
SZ_8K             597 drivers/gpu/drm/exynos/exynos_drm_scaler.c 	{ IPP_SIZE_LIMIT(BUFFER, .h = { 16, SZ_8K }, .v = { 16, SZ_8K }) },
SZ_8K             604 drivers/gpu/drm/exynos/exynos_drm_scaler.c 	{ IPP_SIZE_LIMIT(BUFFER, .h = { 16, SZ_8K }, .v = { 16, SZ_8K }) },
SZ_8K             611 drivers/gpu/drm/exynos/exynos_drm_scaler.c 	{ IPP_SIZE_LIMIT(BUFFER, .h = { 16, SZ_8K }, .v = { 16, SZ_8K }) },
SZ_8K             617 drivers/gpu/drm/exynos/exynos_drm_scaler.c 	{ IPP_SIZE_LIMIT(BUFFER, .h = { 16, SZ_8K }, .v = { 16, SZ_8K })},
SZ_8K              23 drivers/gpu/drm/i915/gt/uc/intel_guc_log.h #define CRASH_BUFFER_SIZE	SZ_8K
SZ_8K              52 drivers/gpu/drm/i915/intel_wopcm.c #define GUC_WOPCM_STACK_RESERVED	SZ_8K
SZ_8K              58 drivers/gpu/drm/i915/intel_wopcm.c #define BXT_WOPCM_RC6_CTX_RESERVED	(SZ_16K + SZ_8K)
SZ_8K             328 drivers/gpu/drm/mediatek/mtk_disp_rdma.c 	.fifo_size = SZ_8K,
SZ_8K             515 drivers/irqchip/irq-gic-v2m.c 		res.end = res.start + SZ_8K - 1;
SZ_8K            2007 drivers/irqchip/irq-gic-v3.c #define ACPI_GICV2_VCPU_MEM_SIZE	(SZ_8K)
SZ_8K            1283 drivers/irqchip/irq-gic.c 	if (resource_size(&cpuif_res) < SZ_8K) {
SZ_8K            1297 drivers/irqchip/irq-gic.c 		alt = ioremap(cpuif_res.start, SZ_8K);
SZ_8K            1559 drivers/irqchip/irq-gic.c #define ACPI_GIC_CPU_IF_MEM_SIZE	(SZ_8K)
SZ_8K            1561 drivers/irqchip/irq-gic.c #define ACPI_GICV2_VCPU_MEM_SIZE	(SZ_8K)
SZ_8K             112 drivers/media/pci/tw686x/tw686x-regs.h #define AUDIO_DMA_SIZE_MASK	(SZ_8K - 1)
SZ_8K             679 drivers/media/platform/qcom/venus/helpers.c 	size = y_plane + uv_plane + SZ_8K;
SZ_8K             489 drivers/mtd/nand/raw/nand_hynix.c 			memorg->oobsize *= memorg->pagesize / SZ_8K;
SZ_8K              44 drivers/mtd/nand/raw/nand_ids.c 		  SZ_8K, SZ_4K, SZ_1M, 0, 8, 640, NAND_ECC_INFO(40, SZ_1K) },
SZ_8K              47 drivers/mtd/nand/raw/nand_ids.c 		  SZ_8K, SZ_8K, SZ_2M, 0, 8, 640, NAND_ECC_INFO(40, SZ_1K) },
SZ_8K              50 drivers/mtd/nand/raw/nand_ids.c 		  SZ_16K, SZ_8K, SZ_4M, 0, 6, 1280, NAND_ECC_INFO(40, SZ_1K) },
SZ_8K              53 drivers/mtd/nand/raw/nand_ids.c 		  SZ_8K, SZ_8K, SZ_2M, NAND_NEED_SCRAMBLING, 6, 640,
SZ_8K              56 drivers/mtd/nand/raw/nand_ids.c 	LEGACY_ID_NAND("NAND 4MiB 5V 8-bit",   0x6B, 4, SZ_8K, SP_OPTIONS),
SZ_8K              57 drivers/mtd/nand/raw/nand_ids.c 	LEGACY_ID_NAND("NAND 4MiB 3,3V 8-bit", 0xE3, 4, SZ_8K, SP_OPTIONS),
SZ_8K              58 drivers/mtd/nand/raw/nand_ids.c 	LEGACY_ID_NAND("NAND 4MiB 3,3V 8-bit", 0xE5, 4, SZ_8K, SP_OPTIONS),
SZ_8K              59 drivers/mtd/nand/raw/nand_ids.c 	LEGACY_ID_NAND("NAND 8MiB 3,3V 8-bit", 0xD6, 8, SZ_8K, SP_OPTIONS),
SZ_8K              60 drivers/mtd/nand/raw/nand_ids.c 	LEGACY_ID_NAND("NAND 8MiB 3,3V 8-bit", 0xE6, 8, SZ_8K, SP_OPTIONS),
SZ_8K             172 drivers/mtd/nand/raw/qcom_nandc.c #define	MAX_NUM_STEPS			(SZ_8K / NANDC_STEP_SIZE)
SZ_8K             129 drivers/mtd/nand/raw/sm_common.c 	LEGACY_ID_NAND("SmartMedia 2MiB 3,3V ROM",   0x5d, 2,   SZ_8K, NAND_ROM),
SZ_8K             130 drivers/mtd/nand/raw/sm_common.c 	LEGACY_ID_NAND("SmartMedia 4MiB 3,3V",       0xe3, 4,   SZ_8K, 0),
SZ_8K             131 drivers/mtd/nand/raw/sm_common.c 	LEGACY_ID_NAND("SmartMedia 4MiB 3,3/5V",     0xe5, 4,   SZ_8K, 0),
SZ_8K             132 drivers/mtd/nand/raw/sm_common.c 	LEGACY_ID_NAND("SmartMedia 4MiB 5V",         0x6b, 4,   SZ_8K, 0),
SZ_8K             133 drivers/mtd/nand/raw/sm_common.c 	LEGACY_ID_NAND("SmartMedia 4MiB 3,3V ROM",   0xd5, 4,   SZ_8K, NAND_ROM),
SZ_8K             134 drivers/mtd/nand/raw/sm_common.c 	LEGACY_ID_NAND("SmartMedia 8MiB 3,3V",       0xe6, 8,   SZ_8K, 0),
SZ_8K             135 drivers/mtd/nand/raw/sm_common.c 	LEGACY_ID_NAND("SmartMedia 8MiB 3,3V ROM",   0xd6, 8,   SZ_8K, NAND_ROM),
SZ_8K             640 drivers/nvdimm/pfn_devs.c 	return ALIGN(SZ_8K, PAGE_SIZE);
SZ_8K             754 drivers/nvdimm/pfn_devs.c 	npfns = PHYS_PFN(size - SZ_8K);
SZ_8K             770 drivers/nvdimm/pfn_devs.c 		offset = ALIGN(start + SZ_8K + MAX_STRUCT_PAGE_SIZE * npfns, align)
SZ_8K             773 drivers/nvdimm/pfn_devs.c 		offset = ALIGN(start + SZ_8K, align) - start;
SZ_8K             320 drivers/nvmem/rave-sp-eeprom.c 	if (size > SZ_8K)
SZ_8K             249 drivers/pcmcia/omap_cf.c 	cf->iomem.end = cf->iomem.end + SZ_8K - 1;
SZ_8K             258 drivers/pcmcia/omap_cf.c 	if (!request_mem_region(cf->phys_cf, SZ_8K, driver_name))
SZ_8K             306 drivers/pcmcia/omap_cf.c 	release_mem_region(cf->phys_cf, SZ_8K);
SZ_8K             324 drivers/pcmcia/omap_cf.c 	release_mem_region(cf->phys_cf, SZ_8K);
SZ_8K             373 drivers/thunderbolt/switch.c 		hdr_size = sw->generation < 3 ? SZ_8K : SZ_16K;
SZ_8K            2094 drivers/usb/gadget/udc/renesas_usb3.c 	else if (ram_size <= SZ_8K)
SZ_8K              55 fs/btrfs/tests/extent-map-tests.c 	u64 len = SZ_8K;
SZ_8K             313 fs/btrfs/tests/extent-map-tests.c 	ret = __test_case_3(fs_info, em_tree, SZ_8K);
SZ_8K             336 fs/btrfs/tests/extent-map-tests.c 	em->len = SZ_8K;
SZ_8K             338 fs/btrfs/tests/extent-map-tests.c 	em->block_len = SZ_8K;
SZ_8K             356 fs/btrfs/tests/extent-map-tests.c 	em->start = SZ_8K;
SZ_8K              13 include/linux/nvme-tcp.h #define NVME_TCP_ADMIN_CCSZ	SZ_8K
SZ_8K              19 sound/soc/sprd/sprd-pcm-compress.c #define SPRD_COMPR_MIN_FRAGMENT_SIZE	SZ_8K