SZ_64M            248 arch/arm/common/it8152.c 	return (dma_addr + size - PHYS_OFFSET) >= SZ_64M;
SZ_64M            259 arch/arm/common/it8152.c 			*dev->dma_mask = (SZ_64M - 1) | PHYS_OFFSET;
SZ_64M            260 arch/arm/common/it8152.c 		dev->coherent_dma_mask = (SZ_64M - 1) | PHYS_OFFSET;
SZ_64M            276 arch/arm/common/it8152.c 	if (mask >= PHYS_OFFSET + SZ_64M - 1)
SZ_64M             55 arch/arm/mach-ep93xx/micro9.c 		ep93xx_register_flash(width, EP93XX_CS1_PHYS_BASE, SZ_64M);
SZ_64M            278 arch/arm/mach-ep93xx/vision_ep9307.c 	ep93xx_register_flash(2, EP93XX_CS6_PHYS_BASE, SZ_64M);
SZ_64M            315 arch/arm/mach-imx/mach-armadillo5x0.c 	.end		= MX31_CS0_BASE_ADDR + SZ_64M - 1,
SZ_64M            348 arch/arm/mach-imx/mach-imx27_visstrim_m10.c 	.end = 0xc0000000 + SZ_64M - 1,
SZ_64M            133 arch/arm/mach-imx/mach-mx35_3ds.c 	.end	= MX35_CS0_BASE_ADDR + SZ_64M - 1,
SZ_64M             91 arch/arm/mach-imx/mach-vpr200.c 	.end	= MX35_CS0_BASE_ADDR + SZ_64M - 1,
SZ_64M            184 arch/arm/mach-ixp4xx/avila-setup.c 	.dma_zone_size	= SZ_64M,
SZ_64M            204 arch/arm/mach-ixp4xx/avila-setup.c 	.dma_zone_size	= SZ_64M,
SZ_64M            376 arch/arm/mach-ixp4xx/common-pci.c 		local_write_config(PCI_BASE_ADDRESS_4, 4, PHYS_OFFSET + SZ_64M);
SZ_64M            286 arch/arm/mach-ixp4xx/common.c 	return (dma_addr + size) > SZ_64M;
SZ_64M            122 arch/arm/mach-ixp4xx/coyote-setup.c 	.dma_zone_size	= SZ_64M,
SZ_64M            301 arch/arm/mach-ixp4xx/dsmg600-setup.c 	.dma_zone_size	= SZ_64M,
SZ_64M            286 arch/arm/mach-ixp4xx/fsg-setup.c 	.dma_zone_size	= SZ_64M,
SZ_64M            109 arch/arm/mach-ixp4xx/gateway7001-setup.c 	.dma_zone_size	= SZ_64M,
SZ_64M            505 arch/arm/mach-ixp4xx/goramo_mlr.c 	.dma_zone_size	= SZ_64M,
SZ_64M            162 arch/arm/mach-ixp4xx/gtwx5715-setup.c 	.dma_zone_size	= SZ_64M,
SZ_64M            270 arch/arm/mach-ixp4xx/ixdp425-setup.c 	.dma_zone_size	= SZ_64M,
SZ_64M            286 arch/arm/mach-ixp4xx/ixdp425-setup.c 	.dma_zone_size	= SZ_64M,
SZ_64M            301 arch/arm/mach-ixp4xx/ixdp425-setup.c 	.dma_zone_size	= SZ_64M,
SZ_64M            316 arch/arm/mach-ixp4xx/ixdp425-setup.c 	.dma_zone_size	= SZ_64M,
SZ_64M            339 arch/arm/mach-ixp4xx/nas100d-setup.c 	.dma_zone_size	= SZ_64M,
SZ_64M            327 arch/arm/mach-ixp4xx/nslu2-setup.c 	.dma_zone_size	= SZ_64M,
SZ_64M            262 arch/arm/mach-ixp4xx/omixp-setup.c 	.dma_zone_size	= SZ_64M,
SZ_64M            259 arch/arm/mach-ixp4xx/vulcan-setup.c 	.dma_zone_size	= SZ_64M,
SZ_64M            110 arch/arm/mach-ixp4xx/wg302v2-setup.c 	.dma_zone_size	= SZ_64M,
SZ_64M             39 arch/arm/mach-omap1/include/mach/tc.h #define	OMAP_CS0_SIZE		SZ_64M
SZ_64M             42 arch/arm/mach-omap1/include/mach/tc.h #define	OMAP_CS1_SIZE		SZ_64M
SZ_64M             51 arch/arm/mach-omap1/include/mach/tc.h #define	OMAP_CS2_SIZE		SZ_64M
SZ_64M             60 arch/arm/mach-omap1/include/mach/tc.h #define	OMAP_CS3_SIZE		SZ_64M
SZ_64M             61 arch/arm/mach-orion5x/kurobox_pro-setup.c 		.size	= SZ_64M,
SZ_64M             64 arch/arm/mach-orion5x/kurobox_pro-setup.c 		.offset	= SZ_4M + SZ_64M,
SZ_64M             65 arch/arm/mach-orion5x/kurobox_pro-setup.c 		.size	= SZ_256M - (SZ_4M + SZ_64M),
SZ_64M            144 arch/arm/mach-pxa/balloon3.c 	.end	= PXA_CS0_PHYS + SZ_64M - 1,
SZ_64M            497 arch/arm/mach-pxa/cm-x2xx.c 		.length		= SZ_64M,
SZ_64M            535 arch/arm/mach-pxa/cm-x2xx.c 	.dma_zone_size	= SZ_64M,
SZ_64M            762 arch/arm/mach-pxa/corgi.c 		memblock_add(0xa0000000, SZ_64M);
SZ_64M            193 arch/arm/mach-pxa/csb726.c 		.start          = PXA_CS4_PHYS + SZ_64M - SZ_2M,
SZ_64M            194 arch/arm/mach-pxa/csb726.c 		.end            = PXA_CS4_PHYS + SZ_64M - 1,
SZ_64M             51 arch/arm/mach-pxa/eseries.c 		memblock_add(0xa0000000, SZ_64M);
SZ_64M             49 arch/arm/mach-pxa/gumstix.c 	.end	= SZ_64M - 1,
SZ_64M            753 arch/arm/mach-pxa/hx4700.c 	[0] = DEFINE_RES_MEM(PXA_CS0_PHYS, SZ_64M),
SZ_64M            754 arch/arm/mach-pxa/hx4700.c 	[1] = DEFINE_RES_MEM(PXA_CS0_PHYS + SZ_64M, SZ_64M),
SZ_64M            211 arch/arm/mach-pxa/lpd270.c 		.end	= PXA_CS0_PHYS + SZ_64M - 1,
SZ_64M            216 arch/arm/mach-pxa/lpd270.c 		.end	= PXA_CS1_PHYS + SZ_64M - 1,
SZ_64M            275 arch/arm/mach-pxa/lubbock.c 		.end	= SZ_64M - 1,
SZ_64M            280 arch/arm/mach-pxa/lubbock.c 		.end	= 0x04000000 + SZ_64M - 1,
SZ_64M            854 arch/arm/mach-pxa/magician.c 	.end	= PXA_CS0_PHYS + SZ_64M - 1,
SZ_64M            190 arch/arm/mach-pxa/mainstone.c 		.end	= PXA_CS0_PHYS + SZ_64M - 1,
SZ_64M            195 arch/arm/mach-pxa/mainstone.c 		.end	= PXA_CS1_PHYS + SZ_64M - 1,
SZ_64M           1014 arch/arm/mach-pxa/spitz.c 	memblock_add(0xa0000000, SZ_64M);
SZ_64M            936 arch/arm/mach-pxa/tosa.c 	memblock_add(0xa0000000, SZ_64M);
SZ_64M            170 arch/arm/mach-pxa/vpac270.c 	.end	= PXA_CS0_PHYS + SZ_64M - 1,
SZ_64M            171 arch/arm/mach-pxa/zeus.c 		.end	= ZEUS_FLASH_PHYS + SZ_64M - 1,
SZ_64M            292 arch/arm/mach-s3c24xx/mach-anubis.c 	[1] = DEFINE_RES_MEM(S3C2410_CS2 + SZ_64M - SZ_2M, SZ_2M),
SZ_64M             94 arch/arm/mach-s3c24xx/mach-smdk2413.c 		memblock_add(0x30000000, SZ_64M);
SZ_64M            131 arch/arm/mach-s3c24xx/mach-vstms.c 		memblock_add(0x30000000, SZ_64M);
SZ_64M             54 arch/arm/mach-s3c64xx/include/mach/map.h #define S3C64XX_SZ_ONENAND0_BUF (SZ_64M)
SZ_64M             60 arch/arm/mach-s3c64xx/include/mach/map.h #define S3C64XX_SZ_ONENAND1_BUF	(SZ_64M)
SZ_64M            158 arch/arm/mach-sa1100/badge4.c 	DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_64M);
SZ_64M             74 arch/mips/include/asm/processor.h #define VDSO_RANDOMIZE_SIZE	(TASK_IS_32BIT_ADDR ? SZ_1M : SZ_64M)
SZ_64M             34 arch/sh/boards/mach-sdk7786/fpga.c 	for (area = PA_AREA0; area < PA_AREA7; area += SZ_64M) {
SZ_64M             44 arch/sh/boards/mach-sdk7786/sram.c 	phys = (area << 26) + SZ_64M - SZ_4K;
SZ_64M             42 arch/sh/drivers/pci/pci-sh7780.c 		.end	= 0x10000000 + SZ_64M - 1,
SZ_64M             54 arch/sh/drivers/pci/pcie-sh7786.c 		.end	= 0x10000000 + SZ_64M - 1,
SZ_64M             60 arch/sh/mm/pmb.c 	{ .size = SZ_64M,  .flag = PMB_SZ_64M,  },
SZ_64M             37 drivers/gpu/drm/tegra/drm.c #define CARVEOUT_SZ SZ_64M
SZ_64M             52 drivers/mmc/core/sd.c 	SZ_16M / 512,	(SZ_16M + SZ_8M) / 512,	SZ_32M / 512,	SZ_64M / 512,
SZ_64M            154 drivers/pci/controller/pci-ftpci100.c 	case SZ_64M:
SZ_64M            656 drivers/pci/controller/pci-v3-semi.c 	case SZ_64M:
SZ_64M             61 drivers/staging/media/imx/imx-media-capture.c #define VID_MEM_LIMIT	SZ_64M
SZ_64M            189 drivers/staging/sm750fb/ddk750_chip.c 		return SZ_64M;
SZ_64M            206 drivers/staging/sm750fb/ddk750_chip.c 		data = SZ_64M; break; /* 64 Mega byte */
SZ_64M           2837 fs/btrfs/block-group.c 		thresh = max_t(u64, SZ_64M, div_factor_fine(thresh, 1));
SZ_64M            137 fs/btrfs/tests/extent-io-tests.c 	test_start = SZ_64M;
SZ_64M            472 fs/btrfs/tests/extent-io-tests.c 	set_extent_bits(&tree, SZ_32M, SZ_64M - 1,
SZ_64M            504 fs/btrfs/tests/extent-io-tests.c 	set_extent_bits(&tree, SZ_64M, SZ_64M + SZ_8M - 1, CHUNK_ALLOCATED);
SZ_64M            505 fs/btrfs/tests/extent-io-tests.c 	find_first_clear_extent_bit(&tree, SZ_64M + SZ_1M, &start, &end,
SZ_64M            508 fs/btrfs/tests/extent-io-tests.c 	if (start != SZ_64M || end != SZ_64M + SZ_8M - 1) {
SZ_64M            514 fs/btrfs/tests/extent-io-tests.c 	find_first_clear_extent_bit(&tree, SZ_64M - SZ_8M, &start, &end,
SZ_64M            521 fs/btrfs/tests/extent-io-tests.c 	if (start != SZ_64M || end != SZ_64M + SZ_8M - 1) {
SZ_64M            532 fs/btrfs/tests/extent-io-tests.c 	if (start != SZ_64M + SZ_8M || end != -1) {