SZ_2G 101 arch/arm/mach-keystone/keystone.c .dma_zone_size = SZ_2G, SZ_2G 272 arch/arm/mach-omap2/board-generic.c .dma_zone_size = SZ_2G, SZ_2G 321 arch/arm/mach-omap2/board-generic.c .dma_zone_size = SZ_2G, SZ_2G 345 arch/arm/mach-omap2/board-generic.c .dma_zone_size = SZ_2G, SZ_2G 138 arch/arm64/kernel/kaslr.c return offset % SZ_2G; SZ_2G 149 arch/arm64/kernel/kaslr.c module_range = SZ_2G - (u64)(_end - _stext); SZ_2G 150 arch/arm64/kernel/kaslr.c module_alloc_base = max((u64)_end + offset - SZ_2G, SZ_2G 52 arch/arm64/kernel/module.c module_alloc_base + SZ_2G, GFP_KERNEL, SZ_2G 122 arch/mips/mti-malta/malta-dtshim.c mem_array[2] = cpu_to_be32(PHYS_OFFSET + SZ_2G + SZ_256M); SZ_2G 241 arch/powerpc/sysdev/dart_iommu.c MEMBLOCK_LOW_LIMIT, SZ_2G, SZ_2G 396 arch/riscv/kernel/module.c max(PFN_ALIGN((unsigned long)&_end - SZ_2G), VMALLOC_START) SZ_2G 553 drivers/gpu/drm/etnaviv/etnaviv_drv.c dma_set_max_seg_size(dev, SZ_2G); SZ_2G 765 drivers/gpu/drm/etnaviv/etnaviv_gpu.c if (dma_mask < PHYS_OFFSET + SZ_2G) SZ_2G 768 drivers/gpu/drm/etnaviv/etnaviv_gpu.c priv->mmu_global->memory_base = dma_mask - SZ_2G + 1; SZ_2G 769 drivers/gpu/drm/etnaviv/etnaviv_gpu.c } else if (PHYS_OFFSET >= SZ_2G) { SZ_2G 1215 drivers/infiniband/core/device.c dma_set_max_seg_size(device->dma_device, SZ_2G); SZ_2G 916 drivers/iommu/io-pgtable-arm-v7s.c if (ops->iova_to_phys(ops, SZ_2G + 42)) SZ_2G 1178 drivers/iommu/io-pgtable-arm.c if (ops->iova_to_phys(ops, SZ_2G + 42)) SZ_2G 882 drivers/iommu/ipmmu-vmsa.c SZ_1G, SZ_2G); SZ_2G 850 drivers/media/platform/mtk-vpu/mtk_vpu.c vpu->enable_4GB = !!(totalram_pages() > (SZ_2G >> PAGE_SHIFT)); SZ_2G 1966 drivers/media/platform/omap3isp/isp.c mapping = arm_iommu_create_mapping(&platform_bus_type, SZ_1G, SZ_2G); SZ_2G 4617 drivers/misc/habanalabs/goya/goya.c lin_dma_pkts_cnt = DIV_ROUND_UP_ULL(size, SZ_2G); SZ_2G 4641 drivers/misc/habanalabs/goya/goya.c lin_dma_pkt->tsize = cpu_to_le32(SZ_2G); SZ_2G 4645 drivers/misc/habanalabs/goya/goya.c size -= SZ_2G; SZ_2G 4646 drivers/misc/habanalabs/goya/goya.c addr += SZ_2G; SZ_2G 169 drivers/pci/controller/pci-ftpci100.c case SZ_2G: SZ_2G 218 drivers/pci/controller/pci-rcar-gen2.c case SZ_2G: SZ_2G 671 drivers/pci/controller/pci-v3-semi.c case SZ_2G: SZ_2G 104 drivers/pci/controller/pcie-cadence-ep.c bool is_64bits = sz > SZ_2G; SZ_2G 186 drivers/pci/controller/pcie-rockchip-ep.c bool is_64bits = sz > SZ_2G; SZ_2G 81 drivers/staging/media/allegro-dvt/allegro-core.c #define MCU_CACHE_OFFSET SZ_2G