SZ_256 12 arch/arm/mach-imx/devices/platform-mx2-emma.c .iosize = SZ_256, \ SZ_256 74 arch/arm/mach-imx/mm-imx21.c mxc_register_gpio("imx21-gpio", 0, MX21_GPIO1_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); SZ_256 75 arch/arm/mach-imx/mm-imx21.c mxc_register_gpio("imx21-gpio", 1, MX21_GPIO2_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); SZ_256 76 arch/arm/mach-imx/mm-imx21.c mxc_register_gpio("imx21-gpio", 2, MX21_GPIO3_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); SZ_256 77 arch/arm/mach-imx/mm-imx21.c mxc_register_gpio("imx21-gpio", 3, MX21_GPIO4_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); SZ_256 78 arch/arm/mach-imx/mm-imx21.c mxc_register_gpio("imx21-gpio", 4, MX21_GPIO5_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); SZ_256 79 arch/arm/mach-imx/mm-imx21.c mxc_register_gpio("imx21-gpio", 5, MX21_GPIO6_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); SZ_256 75 arch/arm/mach-imx/mm-imx27.c mxc_register_gpio("imx21-gpio", 0, MX27_GPIO1_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); SZ_256 76 arch/arm/mach-imx/mm-imx27.c mxc_register_gpio("imx21-gpio", 1, MX27_GPIO2_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); SZ_256 77 arch/arm/mach-imx/mm-imx27.c mxc_register_gpio("imx21-gpio", 2, MX27_GPIO3_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); SZ_256 78 arch/arm/mach-imx/mm-imx27.c mxc_register_gpio("imx21-gpio", 3, MX27_GPIO4_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); SZ_256 79 arch/arm/mach-imx/mm-imx27.c mxc_register_gpio("imx21-gpio", 4, MX27_GPIO5_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); SZ_256 80 arch/arm/mach-imx/mm-imx27.c mxc_register_gpio("imx21-gpio", 5, MX27_GPIO6_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); SZ_256 98 arch/arm/mach-omap1/mcbsp.c .end = OMAP7XX_MCBSP1_BASE + SZ_256, SZ_256 125 arch/arm/mach-omap1/mcbsp.c .end = OMAP7XX_MCBSP2_BASE + SZ_256, SZ_256 175 arch/arm/mach-omap1/mcbsp.c .end = OMAP1510_MCBSP1_BASE + SZ_256, SZ_256 202 arch/arm/mach-omap1/mcbsp.c .end = OMAP1510_MCBSP2_BASE + SZ_256, SZ_256 229 arch/arm/mach-omap1/mcbsp.c .end = OMAP1510_MCBSP3_BASE + SZ_256, SZ_256 282 arch/arm/mach-omap1/mcbsp.c .end = OMAP1610_MCBSP1_BASE + SZ_256, SZ_256 309 arch/arm/mach-omap1/mcbsp.c .end = OMAP1610_MCBSP2_BASE + SZ_256, SZ_256 336 arch/arm/mach-omap1/mcbsp.c .end = OMAP1610_MCBSP3_BASE + SZ_256, SZ_256 39 arch/arm/mach-omap2/pm33xx-core.c scu_base = ioremap(scu_a9_get_base(), SZ_256); SZ_256 51 arch/arm/mach-s3c64xx/dev-audio.c [0] = DEFINE_RES_MEM(S3C64XX_PA_IIS0, SZ_256), SZ_256 70 arch/arm/mach-s3c64xx/dev-audio.c [0] = DEFINE_RES_MEM(S3C64XX_PA_IIS1, SZ_256), SZ_256 89 arch/arm/mach-s3c64xx/dev-audio.c [0] = DEFINE_RES_MEM(S3C64XX_PA_IISV4, SZ_256), SZ_256 135 arch/arm/mach-s3c64xx/dev-audio.c [0] = DEFINE_RES_MEM(S3C64XX_PA_PCM0, SZ_256), SZ_256 154 arch/arm/mach-s3c64xx/dev-audio.c [0] = DEFINE_RES_MEM(S3C64XX_PA_PCM1, SZ_256), SZ_256 185 arch/arm/mach-s3c64xx/dev-audio.c [0] = DEFINE_RES_MEM(S3C64XX_PA_AC97, SZ_256), SZ_256 29 arch/arm/mach-s3c64xx/dev-uart.c [0] = DEFINE_RES_MEM(S3C_PA_UART0, SZ_256), SZ_256 34 arch/arm/mach-s3c64xx/dev-uart.c [0] = DEFINE_RES_MEM(S3C_PA_UART1, SZ_256), SZ_256 39 arch/arm/mach-s3c64xx/dev-uart.c [0] = DEFINE_RES_MEM(S3C_PA_UART2, SZ_256), SZ_256 44 arch/arm/mach-s3c64xx/dev-uart.c [0] = DEFINE_RES_MEM(S3C_PA_UART3, SZ_256), SZ_256 62 arch/arm/mach-tegra/iomap.h #define TEGRA_UARTC_SIZE SZ_256 SZ_256 65 arch/arm/mach-tegra/iomap.h #define TEGRA_UARTD_SIZE SZ_256 SZ_256 68 arch/arm/mach-tegra/iomap.h #define TEGRA_UARTE_SIZE SZ_256 SZ_256 71 arch/arm/mach-tegra/iomap.h #define TEGRA_PMC_SIZE SZ_256 SZ_256 49 arch/arm/mach-zx/platsmp.c scu_base = ioremap(base, SZ_256); SZ_256 150 arch/arm/mach-zynq/common.c .length = SZ_256, SZ_256 105 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256), SZ_256 805 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256), SZ_256 820 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256), SZ_256 935 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256), SZ_256 1062 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256), SZ_256 1098 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256), SZ_256 1134 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256), SZ_256 78 arch/sh/boards/board-apsh4a3a.c .end = 0xA4000000 + SZ_256 - 1, SZ_256 30 arch/sh/boards/board-apsh4ad0a.c .end = 0xA4000000 + SZ_256 - 1, SZ_256 50 arch/sh/boards/mach-sdk7786/setup.c .end = 0x07ffff00 + SZ_256 - 1, SZ_256 379 arch/sh/drivers/pci/pcie-sh7786.c pci_write_reg(chan, ((memsize - SZ_512M) - SZ_256) | 1, SZ_256 395 arch/sh/drivers/pci/pcie-sh7786.c pci_write_reg(chan, (memsize - SZ_256) | 1, SH4A_PCIELAMR0); SZ_256 199 drivers/firmware/tegra/bpmp-debugfs.c const size_t namesize = SZ_256; SZ_256 250 drivers/firmware/tegra/bpmp-debugfs.c const size_t namesize = SZ_256; SZ_256 119 drivers/irqchip/irq-gic-v3-its.c #define ITS_ITT_ALIGN SZ_256 SZ_256 1853 drivers/net/ethernet/amazon/ena/ena_com.c min_t(u32, ena_dev->tx_max_header_size, SZ_256); SZ_256 584 drivers/staging/media/allegro-dvt/allegro-core.c unsigned int pcm_size = SZ_256; SZ_256 585 drivers/staging/media/allegro-dvt/allegro-core.c unsigned int partition_table = SZ_256; SZ_256 549 drivers/staging/media/tegra-vde/vde.c src->y_offset, lsize, SZ_256, SZ_256 557 drivers/staging/media/tegra-vde/vde.c src->cb_offset, csize, SZ_256, SZ_256 565 drivers/staging/media/tegra-vde/vde.c src->cr_offset, csize, SZ_256, SZ_256 578 drivers/staging/media/tegra-vde/vde.c src->aux_offset, csize, SZ_256,