SZ_1M 54 arch/arm/include/asm/tlb.h addr = (addr & PMD_MASK) + SZ_1M; SZ_1M 373 arch/arm/mach-davinci/board-mityomapl138.c .size = SZ_2M + SZ_1M, SZ_1M 29 arch/arm/mach-dove/dove.h #define DOVE_CESA_SIZE SZ_1M SZ_1M 42 arch/arm/mach-dove/dove.h #define DOVE_SCRATCHPAD_SIZE SZ_1M SZ_1M 46 arch/arm/mach-dove/dove.h #define DOVE_SB_REGS_SIZE SZ_1M SZ_1M 105 arch/arm/mach-ep93xx/ts72xx.c #define TS72XX_REDBOOT_PART_SIZE (SZ_2M + SZ_1M) SZ_1M 386 arch/arm/mach-imx/mach-mx27ads.c .length = SZ_1M, SZ_1M 16 arch/arm/mach-imx/mx21.h #define MX21_AIPI_SIZE SZ_1M SZ_1M 59 arch/arm/mach-imx/mx21.h #define MX21_SAHB1_SIZE SZ_1M SZ_1M 15 arch/arm/mach-imx/mx27.h #define MX27_AIPI_SIZE SZ_1M SZ_1M 80 arch/arm/mach-imx/mx27.h #define MX27_SAHB1_SIZE SZ_1M SZ_1M 97 arch/arm/mach-imx/mx27.h #define MX27_X_MEMC_SIZE SZ_1M SZ_1M 17 arch/arm/mach-imx/mx2x.h #define MX2x_AIPI_SIZE SZ_1M SZ_1M 54 arch/arm/mach-imx/mx2x.h #define MX2x_SAHB1_SIZE SZ_1M SZ_1M 12 arch/arm/mach-imx/mx31.h #define MX31_L2CC_SIZE SZ_1M SZ_1M 15 arch/arm/mach-imx/mx31.h #define MX31_AIPS1_SIZE SZ_1M SZ_1M 43 arch/arm/mach-imx/mx31.h #define MX31_SPBA0_SIZE SZ_1M SZ_1M 56 arch/arm/mach-imx/mx31.h #define MX31_AIPS2_SIZE SZ_1M SZ_1M 81 arch/arm/mach-imx/mx31.h #define MX31_ROMP_SIZE SZ_1M SZ_1M 84 arch/arm/mach-imx/mx31.h #define MX31_AVIC_SIZE SZ_1M SZ_1M 12 arch/arm/mach-imx/mx35.h #define MX35_L2CC_SIZE SZ_1M SZ_1M 15 arch/arm/mach-imx/mx35.h #define MX35_AIPS1_SIZE SZ_1M SZ_1M 36 arch/arm/mach-imx/mx35.h #define MX35_SPBA0_SIZE SZ_1M SZ_1M 46 arch/arm/mach-imx/mx35.h #define MX35_AIPS2_SIZE SZ_1M SZ_1M 79 arch/arm/mach-imx/mx35.h #define MX35_ROMP_SIZE SZ_1M SZ_1M 82 arch/arm/mach-imx/mx35.h #define MX35_AVIC_SIZE SZ_1M SZ_1M 37 arch/arm/mach-imx/mx3x.h #define MX3x_L2CC_SIZE SZ_1M SZ_1M 43 arch/arm/mach-imx/mx3x.h #define MX3x_AIPS1_SIZE SZ_1M SZ_1M 67 arch/arm/mach-imx/mx3x.h #define MX3x_SPBA0_SIZE SZ_1M SZ_1M 79 arch/arm/mach-imx/mx3x.h #define MX3x_AIPS2_SIZE SZ_1M SZ_1M 101 arch/arm/mach-imx/mx3x.h #define MX3x_ROMP_SIZE SZ_1M SZ_1M 104 arch/arm/mach-imx/mx3x.h #define MX3x_AVIC_SIZE SZ_1M SZ_1M 208 arch/arm/mach-integrator/impd1.c unsigned long framesize = SZ_1M; SZ_1M 147 arch/arm/mach-mmp/aspenite.c .size = SZ_1M, SZ_1M 162 arch/arm/mach-mmp/aspenite.c .size = (SZ_2M + SZ_1M), SZ_1M 84 arch/arm/mach-mmp/ttc_dkb.c .size = SZ_1M, SZ_1M 99 arch/arm/mach-mmp/ttc_dkb.c .size = (SZ_2M + SZ_1M), SZ_1M 117 arch/arm/mach-mmp/ttc_dkb.c .end = SMC_CS0_PHYS_BASE + SZ_1M, SZ_1M 49 arch/arm/mach-mv78xx0/mv78xx0.h #define MV78XX0_PCIE_IO_SIZE SZ_1M SZ_1M 53 arch/arm/mach-mv78xx0/mv78xx0.h #define MV78XX0_REGS_SIZE SZ_1M SZ_1M 169 arch/arm/mach-omap1/board-h2.c .size = 2 * SZ_1M, SZ_1M 173 arch/arm/mach-omap1/board-h3.c .size = 2 * SZ_1M, SZ_1M 88 arch/arm/mach-omap1/board-palmtt.c .size = 7 * SZ_1M + 4 * SZ_64K - 16 * SZ_8K, SZ_1M 60 arch/arm/mach-omap2/iomap.h #define L3_24XX_SIZE SZ_1M /* 44kB of 128MB used, want 1MB sect */ SZ_1M 63 arch/arm/mach-omap2/iomap.h #define L4_24XX_SIZE SZ_1M /* 1MB of 128MB used, want 1MB sect */ SZ_1M 67 arch/arm/mach-omap2/iomap.h #define L4_WK_243X_SIZE SZ_1M SZ_1M 71 arch/arm/mach-omap2/iomap.h #define OMAP243X_GPMC_SIZE SZ_1M SZ_1M 75 arch/arm/mach-omap2/iomap.h #define OMAP243X_SDRC_SIZE SZ_1M SZ_1M 79 arch/arm/mach-omap2/iomap.h #define OMAP243X_SMS_SIZE SZ_1M SZ_1M 106 arch/arm/mach-omap2/iomap.h #define L3_34XX_SIZE SZ_1M /* 44kB of 128MB used, want 1MB sect */ SZ_1M 129 arch/arm/mach-omap2/iomap.h #define L4_PER_34XX_SIZE SZ_1M SZ_1M 139 arch/arm/mach-omap2/iomap.h #define OMAP34XX_GPMC_SIZE SZ_1M SZ_1M 144 arch/arm/mach-omap2/iomap.h #define OMAP343X_SMS_SIZE SZ_1M SZ_1M 149 arch/arm/mach-omap2/iomap.h #define OMAP343X_SDRC_SIZE SZ_1M SZ_1M 162 arch/arm/mach-omap2/iomap.h #define L3_44XX_SIZE SZ_1M SZ_1M 176 arch/arm/mach-omap2/iomap.h #define L4_ABE_44XX_SIZE SZ_1M SZ_1M 184 arch/arm/mach-omap2/iomap.h #define L3_54XX_SIZE SZ_1M SZ_1M 210 arch/arm/mach-omap2/iomap.h #define L3_MAIN_SN_DRA7XX_SIZE SZ_1M SZ_1M 218 arch/arm/mach-omap2/iomap.h #define L4_PER1_DRA7XX_SIZE SZ_1M SZ_1M 227 arch/arm/mach-omap2/iomap.h #define L4_CFG_MPU_DRA7XX_SIZE SZ_1M SZ_1M 235 arch/arm/mach-omap2/iomap.h #define L4_PER2_DRA7XX_SIZE SZ_1M SZ_1M 251 arch/arm/mach-omap2/iomap.h #define L4_CFG_DRA7XX_SIZE (SZ_1M + SZ_2M) SZ_1M 259 arch/arm/mach-omap2/iomap.h #define L4_WKUP_DRA7XX_SIZE SZ_1M SZ_1M 151 arch/arm/mach-omap2/omap4-common.c dram_sync_size = ALIGN(PAGE_SIZE, SZ_1M); SZ_1M 152 arch/arm/mach-omap2/omap4-common.c dram_sync_paddr = arm_memblock_steal(dram_sync_size, SZ_1M); SZ_1M 41 arch/arm/mach-orion5x/orion5x.h #define ORION5X_REGS_SIZE SZ_1M SZ_1M 38 arch/arm/mach-orion5x/ts78xx-setup.c #define TS78XX_FPGA_REGS_SIZE SZ_1M SZ_1M 426 arch/arm/mach-pxa/cm-x300.c .size = SZ_256K + SZ_1M, SZ_1M 127 arch/arm/mach-pxa/colibri-pxa3xx.c .size = SZ_1M, SZ_1M 429 arch/arm/mach-pxa/em-x270.c .end = PXA_CS0_PHYS + SZ_1M - 1, SZ_1M 285 arch/arm/mach-pxa/palmtx.c .end = PXA_CS1_PHYS + SZ_1M - 1, SZ_1M 320 arch/arm/mach-pxa/palmtx.c .length = SZ_1M, SZ_1M 325 arch/arm/mach-pxa/palmtx.c .length = SZ_1M, SZ_1M 520 arch/arm/mach-pxa/saar.c .size = SZ_1M, SZ_1M 535 arch/arm/mach-pxa/saar.c .size = (SZ_2M + SZ_1M), SZ_1M 555 arch/arm/mach-pxa/saar.c .end = SMC_CS0_PHYS_BASE + SZ_1M, SZ_1M 656 arch/arm/mach-pxa/viper.c .end = VIPER_BOOT_PHYS + SZ_1M - 1, SZ_1M 671 arch/arm/mach-pxa/viper.c .size = SZ_1M, SZ_1M 211 arch/arm/mach-pxa/vpac270.c .end = PXA_CS0_PHYS + SZ_1M, SZ_1M 130 arch/arm/mach-s3c24xx/common-smdk.c .offset = SZ_1M * 10, SZ_1M 135 arch/arm/mach-s3c24xx/common-smdk.c .offset = SZ_1M * 14, SZ_1M 136 arch/arm/mach-s3c24xx/common-smdk.c .size = SZ_1M * 10, SZ_1M 140 arch/arm/mach-s3c24xx/common-smdk.c .offset = SZ_1M * 24, SZ_1M 141 arch/arm/mach-s3c24xx/common-smdk.c .size = SZ_1M * 24, SZ_1M 145 arch/arm/mach-s3c24xx/common-smdk.c .offset = SZ_1M * 48, SZ_1M 20 arch/arm/mach-s3c24xx/include/mach/map.h #define S3C24XX_SZ_IRQ SZ_1M SZ_1M 24 arch/arm/mach-s3c24xx/include/mach/map.h #define S3C24XX_SZ_MEMCTRL SZ_1M SZ_1M 28 arch/arm/mach-s3c24xx/include/mach/map.h #define S3C24XX_SZ_TIMER SZ_1M SZ_1M 31 arch/arm/mach-s3c24xx/include/mach/map.h #define S3C24XX_SZ_CLKPWR SZ_1M SZ_1M 35 arch/arm/mach-s3c24xx/include/mach/map.h #define S3C24XX_SZ_USBDEV SZ_1M SZ_1M 39 arch/arm/mach-s3c24xx/include/mach/map.h #define S3C24XX_SZ_WATCHDOG SZ_1M SZ_1M 43 arch/arm/mach-s3c24xx/include/mach/map.h #define S3C24XX_SZ_UART SZ_1M SZ_1M 44 arch/arm/mach-s3c24xx/include/mach/map.h #define S3C24XX_SZ_IIS SZ_1M SZ_1M 45 arch/arm/mach-s3c24xx/include/mach/map.h #define S3C24XX_SZ_ADC SZ_1M SZ_1M 46 arch/arm/mach-s3c24xx/include/mach/map.h #define S3C24XX_SZ_SPI SZ_1M SZ_1M 47 arch/arm/mach-s3c24xx/include/mach/map.h #define S3C24XX_SZ_SDI SZ_1M SZ_1M 48 arch/arm/mach-s3c24xx/include/mach/map.h #define S3C24XX_SZ_NAND SZ_1M SZ_1M 49 arch/arm/mach-s3c24xx/include/mach/map.h #define S3C24XX_SZ_GPIO SZ_1M SZ_1M 60 arch/arm/mach-s3c24xx/include/mach/map.h #define S3C24XX_SZ_DMA SZ_1M SZ_1M 67 arch/arm/mach-s3c24xx/include/mach/map.h #define S3C24XX_SZ_LCD SZ_1M SZ_1M 80 arch/arm/mach-s3c24xx/include/mach/map.h #define S3C24XX_SZ_RTC SZ_1M SZ_1M 95 arch/arm/mach-s3c24xx/include/mach/map.h #define S3C2440_SZ_CAMIF SZ_1M SZ_1M 100 arch/arm/mach-s3c24xx/include/mach/map.h #define S3C2440_SZ_AC97 SZ_1M SZ_1M 91 arch/arm/mach-s3c24xx/mach-bast.c .length = SZ_1M, SZ_1M 96 arch/arm/mach-s3c24xx/mach-bast.c .length = SZ_1M, SZ_1M 101 arch/arm/mach-s3c24xx/mach-bast.c .length = SZ_1M, SZ_1M 106 arch/arm/mach-s3c24xx/mach-bast.c .length = SZ_1M, SZ_1M 113 arch/arm/mach-s3c24xx/mach-bast.c .length = SZ_1M, SZ_1M 118 arch/arm/mach-s3c24xx/mach-bast.c .length = SZ_1M, SZ_1M 123 arch/arm/mach-s3c24xx/mach-bast.c .length = SZ_1M, SZ_1M 134 arch/arm/mach-s3c24xx/mach-bast.c { VA_C2(BAST_VA_SUPERIO), PA_CS2(BAST_PA_SUPERIO), SZ_1M, MT_DEVICE }, SZ_1M 139 arch/arm/mach-s3c24xx/mach-bast.c { VA_C3(BAST_VA_SUPERIO), PA_CS3(BAST_PA_SUPERIO), SZ_1M, MT_DEVICE }, SZ_1M 144 arch/arm/mach-s3c24xx/mach-bast.c { VA_C4(BAST_VA_SUPERIO), PA_CS4(BAST_PA_SUPERIO), SZ_1M, MT_DEVICE }, SZ_1M 149 arch/arm/mach-s3c24xx/mach-bast.c { VA_C5(BAST_VA_SUPERIO), PA_CS5(BAST_PA_SUPERIO), SZ_1M, MT_DEVICE }, SZ_1M 97 arch/arm/mach-s3c24xx/mach-gta02.c .length = SZ_1M, SZ_1M 126 arch/arm/mach-s3c24xx/mach-jive.c .size = (20 * SZ_1M), SZ_1M 133 arch/arm/mach-s3c24xx/mach-jive.c .offset = (44 * SZ_1M), SZ_1M 134 arch/arm/mach-s3c24xx/mach-jive.c .size = (20 * SZ_1M), SZ_1M 147 arch/arm/mach-s3c24xx/mach-jive.c .offset = (22 * SZ_1M), SZ_1M 148 arch/arm/mach-s3c24xx/mach-jive.c .size = (2 * SZ_1M) - (192 * SZ_1K), SZ_1M 151 arch/arm/mach-s3c24xx/mach-jive.c .offset = (24 * SZ_1M) - (192*SZ_1K), SZ_1M 152 arch/arm/mach-s3c24xx/mach-jive.c .size = (20 * SZ_1M), SZ_1M 178 arch/arm/mach-s3c24xx/mach-jive.c .offset = (22 * SZ_1M), SZ_1M 179 arch/arm/mach-s3c24xx/mach-jive.c .size = (2 * SZ_1M) - (192 * SZ_1K), SZ_1M 184 arch/arm/mach-s3c24xx/mach-jive.c .offset = (24 * SZ_1M) - (192 * SZ_1K), SZ_1M 185 arch/arm/mach-s3c24xx/mach-jive.c .size = (20 * SZ_1M), SZ_1M 192 arch/arm/mach-s3c24xx/mach-jive.c .offset = (44 * SZ_1M), SZ_1M 193 arch/arm/mach-s3c24xx/mach-jive.c .size = (20 * SZ_1M), SZ_1M 207 arch/arm/mach-s3c24xx/mach-jive.c .size = (2 * SZ_1M) - (192 * SZ_1K), SZ_1M 210 arch/arm/mach-s3c24xx/mach-jive.c .offset = (2 * SZ_1M), SZ_1M 211 arch/arm/mach-s3c24xx/mach-jive.c .size = (20 * SZ_1M), SZ_1M 243 arch/arm/mach-s3c24xx/mach-osiris.c [0] = DEFINE_RES_MEM(0x0f000000, SZ_1M), SZ_1M 244 arch/arm/mach-s3c24xx/mach-osiris.c [1] = DEFINE_RES_MEM(0x0c000000, SZ_1M), SZ_1M 53 arch/arm/mach-s3c24xx/mach-qt2410.c { 0xe0000000, __phys_to_pfn(S3C2410_CS3+0x01000000), SZ_1M, MT_DEVICE } SZ_1M 57 arch/arm/mach-s3c24xx/mach-rx3715.c .length = SZ_1M, SZ_1M 62 arch/arm/mach-s3c24xx/mach-rx3715.c .length = SZ_1M, SZ_1M 81 arch/arm/mach-s3c24xx/mach-vr1000.c .length = SZ_1M, SZ_1M 86 arch/arm/mach-s3c24xx/mach-vr1000.c .length = SZ_1M, SZ_1M 91 arch/arm/mach-s3c24xx/mach-vr1000.c .length = SZ_1M, SZ_1M 96 arch/arm/mach-s3c24xx/mach-vr1000.c .length = SZ_1M, SZ_1M 67 arch/arm/mach-s3c24xx/s3c2412.c .length = SZ_1M, SZ_1M 73 arch/arm/mach-s3c24xx/s3c2412.c .length = SZ_1M, SZ_1M 179 arch/arm/mach-s3c64xx/mach-hmt.c .offset = SZ_1M, SZ_1M 184 arch/arm/mach-s3c64xx/mach-hmt.c .offset = SZ_1M + SZ_2M, SZ_1M 109 arch/arm/mach-s3c64xx/mach-mini6410.c .size = SZ_1M, SZ_1M 115 arch/arm/mach-s3c64xx/mach-mini6410.c .offset = SZ_1M, SZ_1M 120 arch/arm/mach-s3c64xx/mach-mini6410.c .offset = SZ_1M + SZ_2M, SZ_1M 161 arch/arm/mach-s3c64xx/mach-real6410.c .size = SZ_1M, SZ_1M 167 arch/arm/mach-s3c64xx/mach-real6410.c .offset = SZ_1M, SZ_1M 172 arch/arm/mach-s3c64xx/mach-real6410.c .offset = SZ_1M + SZ_2M, SZ_1M 774 arch/arm/mach-sa1100/assabet.c .dma_zone_size = SZ_1M, SZ_1M 335 arch/arm/mach-sa1100/badge4.c .dma_zone_size = SZ_1M, SZ_1M 42 arch/arm/mach-sa1100/include/mach/nanoengine.h #define NANO_PCI_MEM_RW_SIZE SZ_1M SZ_1M 377 arch/arm/mach-sa1100/jornada720.c .dma_zone_size = SZ_1M, SZ_1M 1157 arch/arm/mm/cache-l2x0.c ALIGN(filter[0] + filter[1], SZ_1M); SZ_1M 1158 arch/arm/mm/cache-l2x0.c l2x0_saved_regs.filter_start = (filter[0] & ~(SZ_1M - 1)) SZ_1M 143 arch/arm/mm/ioremap.c unsigned long addr = virt, end = virt + (size & ~(SZ_1M - 1)); SZ_1M 207 arch/arm/mm/ioremap.c pfn += SZ_1M >> PAGE_SHIFT; SZ_1M 209 arch/arm/mm/ioremap.c pfn += SZ_1M >> PAGE_SHIFT; SZ_1M 1373 arch/arm/mm/mmu.c map.length = SZ_1M; SZ_1M 1378 arch/arm/mm/mmu.c map.pfn = __phys_to_pfn(FLUSH_BASE_PHYS + SZ_1M); SZ_1M 1380 arch/arm/mm/mmu.c map.length = SZ_1M; SZ_1M 652 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M), SZ_1M 510 arch/arm64/kernel/insn.c offset = branch_imm_common(pc, addr, SZ_1M); SZ_1M 511 arch/arm64/kernel/insn.c if (offset >= SZ_1M) SZ_1M 549 arch/arm64/kernel/insn.c offset = branch_imm_common(pc, addr, SZ_1M); SZ_1M 1292 arch/arm64/kernel/insn.c if (offset < -SZ_1M || offset >= SZ_1M) SZ_1M 74 arch/mips/include/asm/processor.h #define VDSO_RANDOMIZE_SIZE (TASK_IS_32BIT_ADDR ? SZ_1M : SZ_64M) SZ_1M 141 arch/mips/kernel/setup.c ((unsigned long long) size) / SZ_1M, SZ_1M 143 arch/mips/kernel/setup.c ((unsigned long long) sz_min) / SZ_1M, SZ_1M 144 arch/mips/kernel/setup.c ((unsigned long long) sz_max) / SZ_1M); SZ_1M 87 arch/mips/ralink/of.c add_memory_region(soc_info.mem_base, soc_info.mem_size * SZ_1M, SZ_1M 91 arch/mips/ralink/of.c soc_info.mem_size_min * SZ_1M, SZ_1M 92 arch/mips/ralink/of.c soc_info.mem_size_max * SZ_1M); SZ_1M 117 arch/powerpc/kvm/book3s_hv_builtin.c (unsigned long)selected_size / SZ_1M); SZ_1M 309 arch/sh/drivers/pci/pci-sh7780.c __raw_writel((((memsize - SZ_512M) - SZ_1M) & 0x1ff00000) | 1, SZ_1M 325 arch/sh/drivers/pci/pci-sh7780.c __raw_writel(((memsize - SZ_1M) & 0x1ff00000) | 1, SZ_1M 59 arch/sh/drivers/pci/pcie-sh7786.c .end = 0xfe100000 + SZ_1M - 1, SZ_1M 83 arch/sh/drivers/pci/pcie-sh7786.c .end = 0xfe300000 + SZ_1M - 1, SZ_1M 107 arch/sh/drivers/pci/pcie-sh7786.c .end = 0xfcd00000 + SZ_1M - 1, SZ_1M 65 drivers/gpu/drm/arm/malidp_planes.c #define MALIDP_MMU_PREFETCH_FULL_PGSIZES (SZ_1M | SZ_2M) SZ_1M 219 drivers/gpu/drm/i915/gem/i915_gem_mman.c #define MIN_CHUNK_PAGES (SZ_1M >> PAGE_SHIFT) SZ_1M 1193 drivers/gpu/drm/i915/gem/selftests/huge_pages.c SZ_1M, SZ_1M 1204 drivers/gpu/drm/i915/gt/selftest_hangcheck.c obj = i915_gem_object_create_internal(gt->i915, SZ_1M); SZ_1M 157 drivers/gpu/drm/i915/gt/uc/intel_guc.c #if (((CRASH_BUFFER_SIZE) % SZ_1M) == 0) SZ_1M 158 drivers/gpu/drm/i915/gt/uc/intel_guc.c #define UNIT SZ_1M SZ_1M 45 drivers/gpu/drm/i915/intel_wopcm.c #define GEN9_WOPCM_SIZE SZ_1M SZ_1M 1150 drivers/gpu/drm/msm/adreno/a5xx_gpu.c SZ_1M, MSM_BO_UNCACHED, gpu->aspace, SZ_1M 950 drivers/gpu/drm/msm/adreno/a6xx_gmu.c gmu->uncached_iova_base += ALIGN(size, SZ_1M); SZ_1M 110 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c #define A6XX_CD_DATA_SIZE (SZ_1M - 8192) SZ_1M 116 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c SZ_1M, MSM_BO_UNCACHED, gpu->aspace, SZ_1M 92 drivers/gpu/drm/msm/adreno/adreno_device.c .gmem = SZ_1M, SZ_1M 103 drivers/gpu/drm/msm/adreno/adreno_device.c .gmem = (SZ_1M + SZ_512K), SZ_1M 114 drivers/gpu/drm/msm/adreno/adreno_device.c .gmem = (SZ_1M + SZ_512K), SZ_1M 126 drivers/gpu/drm/msm/adreno/adreno_device.c .gmem = SZ_1M, SZ_1M 145 drivers/gpu/drm/msm/adreno/adreno_device.c .gmem = SZ_1M, SZ_1M 162 drivers/gpu/drm/msm/adreno/adreno_device.c .gmem = SZ_1M, SZ_1M 153 drivers/hwtracing/coresight/coresight-catu.c table_end = offset + SZ_1M < buf_size ? SZ_1M 154 drivers/hwtracing/coresight/coresight-catu.c offset + SZ_1M : buf_size; SZ_1M 209 drivers/hwtracing/coresight/coresight-catu.c table_end = (offset + SZ_1M) < buf_size ? SZ_1M 210 drivers/hwtracing/coresight/coresight-catu.c (offset + SZ_1M) : buf_size; SZ_1M 270 drivers/hwtracing/coresight/coresight-catu.c nr_tpages = DIV_ROUND_UP(size, SZ_1M) / CATU_PAGES_PER_SYSPAGE; SZ_1M 53 drivers/hwtracing/coresight/coresight-tmc-etr.c #define TMC_ETR_PERF_MIN_BUF_SIZE SZ_1M SZ_1M 860 drivers/hwtracing/coresight/coresight-tmc-etr.c (!has_sg || has_iommu || size < SZ_1M)) SZ_1M 430 drivers/hwtracing/coresight/coresight-tmc.c size = SZ_1M; SZ_1M 1825 drivers/iommu/arm-smmu.c smmu->pgsize_bitmap |= SZ_4K | SZ_64K | SZ_1M | SZ_16M; SZ_1M 799 drivers/iommu/io-pgtable-arm-v7s.c cfg->pgsize_bitmap &= SZ_4K | SZ_64K | SZ_1M | SZ_16M; SZ_1M 891 drivers/iommu/io-pgtable-arm-v7s.c .pgsize_bitmap = SZ_4K | SZ_64K | SZ_1M | SZ_16M, SZ_1M 35 drivers/iommu/msm_iommu.c #define MSM_IOMMU_PGSIZES (SZ_4K | SZ_64K | SZ_1M | SZ_16M) SZ_1M 587 drivers/iommu/mtk_iommu.c .pgsize_bitmap = SZ_4K | SZ_64K | SZ_1M | SZ_16M, SZ_1M 50 drivers/iommu/omap-iommu.c #define OMAP_IOMMU_PGSIZES (SZ_4K | SZ_64K | SZ_1M | SZ_16M) SZ_1M 213 drivers/iommu/omap-iommu.h ((bytes) >= SZ_1M) ? SZ_1M : \ SZ_1M 219 drivers/iommu/omap-iommu.h ((bytes) == SZ_1M) ? MMU_CAM_PGSZ_1M : \ SZ_1M 225 drivers/iommu/omap-iommu.h ((iopgsz) == MMU_CAM_PGSZ_1M) ? SZ_1M : \ SZ_1M 616 drivers/iommu/qcom_iommu.c .pgsize_bitmap = SZ_4K | SZ_64K | SZ_1M | SZ_16M, SZ_1M 24 drivers/media/i2c/m5mols/m5mols.h #define M5MOLS_MAIN_JPEG_SIZE_MAX (5 * SZ_1M) SZ_1M 1172 drivers/media/i2c/s5c73m3/s5c73m3-core.c fd->entry[0].length = 10 * SZ_1M; SZ_1M 42 drivers/media/platform/exynos4-is/fimc-core.h #define FIMC_MAX_JPEG_BUF_SIZE (10 * SZ_1M) SZ_1M 38 drivers/media/platform/mtk-vpu/mtk_vpu.c #define VPU_EXT_P_SIZE SZ_1M SZ_1M 24 drivers/media/platform/qcom/venus/firmware.c #define VENUS_FW_MEM_SIZE (6 * SZ_1M) SZ_1M 95 drivers/media/platform/qcom/venus/hfi_venus.c ALIGNED_QDSS_SIZE, SZ_1M) SZ_1M 46 drivers/media/platform/s5p-mfc/regs-mfc-v10.h #define MFC_H264_DEC_CTX_BUF_SIZE_V10 (2 * SZ_1M) SZ_1M 53 drivers/media/platform/s5p-mfc/regs-mfc-v10.h #define MAX_FW_SIZE_V10 (SZ_1M) SZ_1M 54 drivers/media/platform/s5p-mfc/regs-mfc-v10.h #define MAX_CPB_SIZE_V10 (3 * SZ_1M) SZ_1M 372 drivers/media/platform/s5p-mfc/regs-mfc-v6.h #define S5P_FIMV_MAX_FRAME_SIZE_V6 (2 * SZ_1M) SZ_1M 397 drivers/media/platform/s5p-mfc/regs-mfc-v6.h #define MFC_H264_DEC_CTX_BUF_SIZE_V6 (2 * SZ_1M) /* 2MB */ SZ_1M 404 drivers/media/platform/s5p-mfc/regs-mfc-v6.h #define MAX_CPB_SIZE_V6 (3 * SZ_1M) /* 3MB */ SZ_1M 35 drivers/media/platform/s5p-mfc/regs-mfc-v7.h #define MAX_CPB_SIZE_V7 (3 * SZ_1M) /* 3MB */ SZ_1M 44 drivers/media/platform/s5p-mfc/regs-mfc-v7.h #define MFC_H264_DEC_CTX_BUF_SIZE_V7 (2 * SZ_1M) /* 2MB */ SZ_1M 51 drivers/media/platform/s5p-mfc/regs-mfc-v7.h (SZ_1M + ((w) * 144) + (8192 * (h)) + 49216) SZ_1M 93 drivers/media/platform/s5p-mfc/regs-mfc-v8.h #define MFC_H264_DEC_CTX_BUF_SIZE_V8 (2 * SZ_1M) /* 2MB */ SZ_1M 119 drivers/media/platform/s5p-mfc/regs-mfc-v8.h #define MAX_CPB_SIZE_V8 (3 * SZ_1M) /* 3MB */ SZ_1M 444 drivers/media/platform/s5p-mfc/regs-mfc.h #define MAX_CPB_SIZE (4 * SZ_1M) /* 4MB */ SZ_1M 1203 drivers/media/platform/s5p-mfc/s5p_mfc.c (mem_size / SZ_1M)); SZ_1M 1229 drivers/media/platform/s5p-mfc/s5p_mfc.c (mem_size / SZ_1M)); SZ_1M 50 drivers/mmc/core/sd.c SZ_128K / 512, SZ_256K / 512, SZ_512K / 512, SZ_1M / 512, SZ_1M 51 drivers/mtd/nand/raw/ams-delta.c .size = 3 * SZ_1M + SZ_512K }, SZ_1M 53 drivers/mtd/nand/raw/ams-delta.c .offset = 3 * SZ_1M + SZ_512K, SZ_1M 56 drivers/mtd/nand/raw/ams-delta.c .offset = 3 * SZ_1M + SZ_512K + SZ_256K, SZ_1M 59 drivers/mtd/nand/raw/ams-delta.c .offset = 4 * SZ_1M, SZ_1M 62 drivers/mtd/nand/raw/ams-delta.c .offset = 4 * SZ_1M + 1 * SZ_256K, SZ_1M 63 drivers/mtd/nand/raw/ams-delta.c .size = 27 * SZ_1M }, SZ_1M 65 drivers/mtd/nand/raw/ams-delta.c .offset = 32 * SZ_1M - 3 * SZ_256K, SZ_1M 639 drivers/mtd/nand/raw/nand_hynix.c memorg->pages_per_eraseblock = (SZ_1M << tmp) / SZ_1M 641 drivers/mtd/nand/raw/nand_hynix.c mtd->erasesize = SZ_1M << tmp; SZ_1M 44 drivers/mtd/nand/raw/nand_ids.c SZ_8K, SZ_4K, SZ_1M, 0, 8, 640, NAND_ECC_INFO(40, SZ_1K) }, SZ_1M 48 drivers/mtd/parsers/sharpslpart.c #define SHARPSL_FTL_PART_SIZE (7 * SZ_1M) SZ_1M 682 drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp.c def_size = FIELD_GET(NSP_DFLT_BUFFER_SIZE_MB, reg) * SZ_1M + SZ_1M 97 drivers/ntb/test/ntb_perf.c #define MAX_CHUNK_SIZE SZ_1M SZ_1M 1983 drivers/nvme/host/pci.c u64 max = (u64)max_host_mem_size_mb * SZ_1M; SZ_1M 1993 drivers/nvme/host/pci.c min >> ilog2(SZ_1M), max_host_mem_size_mb); SZ_1M 2017 drivers/nvme/host/pci.c dev->host_mem_size >> ilog2(SZ_1M)); SZ_1M 505 drivers/of/fdt.c uname, &base, (unsigned long)size / SZ_1M); SZ_1M 508 drivers/of/fdt.c uname, &base, (unsigned long)size / SZ_1M); SZ_1M 139 drivers/of/of_reserved_mem.c (unsigned long)size / SZ_1M); SZ_1M 150 drivers/of/of_reserved_mem.c uname, &base, (unsigned long)size / SZ_1M); SZ_1M 425 drivers/pci/controller/dwc/pci-keystone.c start += OB_WIN_SIZE * SZ_1M; SZ_1M 976 drivers/pci/controller/dwc/pci-keystone.c .bar_fixed_size[2] = SZ_1M, SZ_1M 979 drivers/pci/controller/dwc/pci-keystone.c .bar_fixed_size[5] = SZ_1M, SZ_1M 980 drivers/pci/controller/dwc/pci-keystone.c .align = SZ_1M, SZ_1M 136 drivers/pci/controller/pci-ftpci100.c case SZ_1M: SZ_1M 701 drivers/pci/controller/pci-mvebu.c return round_up(start, max_t(resource_size_t, SZ_1M, SZ_1M 638 drivers/pci/controller/pci-v3-semi.c case SZ_1M: SZ_1M 479 drivers/pci/controller/pci-xgene.c if ((size > SZ_1M) && (size < SZ_1T) && !(*ib_reg_mask & (1 << 2))) { SZ_1M 201 drivers/pci/controller/pcie-iproc.c .size_unit = SZ_1M, SZ_1M 956 drivers/pci/controller/pcie-iproc.c ob_map->window_sizes[size_idx] * SZ_1M; SZ_1M 1041 drivers/pci/controller/pcie-rockchip-host.c rockchip->msg_region = devm_ioremap(dev, rockchip->msg_bus_addr, SZ_1M); SZ_1M 23 drivers/pinctrl/mvebu/pinctrl-dove.c #define INT_REGS_MASK ~(SZ_1M - 1) SZ_1M 518 drivers/s390/net/ism_drv.c dma_set_seg_boundary(&pdev->dev, SZ_1M - 1); SZ_1M 519 drivers/s390/net/ism_drv.c dma_set_max_seg_size(&pdev->dev, SZ_1M); SZ_1M 374 drivers/thunderbolt/switch.c nvm_size = (SZ_1M << (val & 7)) / 8; SZ_1M 847 drivers/video/fbdev/omap2/omapfb/omapfb-ioctl.c p.vram_info.total = SZ_1M * 64; SZ_1M 848 drivers/video/fbdev/omap2/omapfb/omapfb-ioctl.c p.vram_info.free = SZ_1M * 64; SZ_1M 849 drivers/video/fbdev/omap2/omapfb/omapfb-ioctl.c p.vram_info.largest_free_block = SZ_1M * 64; SZ_1M 27 drivers/virt/vboxguest/vboxguest_utils.c #define VBG_MAX_HGCM_USER_PARM (24 * SZ_1M) SZ_1M 29 drivers/virt/vboxguest/vboxguest_utils.c #define VBG_MAX_HGCM_KERNEL_PARM (16 * SZ_1M) SZ_1M 32 drivers/watchdog/orion_wdt.c #define INTERNAL_REGS_MASK ~(SZ_1M - 1) SZ_1M 1202 fs/btrfs/block-group.c min_allocable_bytes = SZ_1M; SZ_1M 2165 fs/btrfs/block-group.c if (block_group->key.offset < (100 * SZ_1M)) { SZ_1M 5559 fs/btrfs/extent-tree.c u64 start = SZ_1M, len = 0, end = 0; SZ_1M 5591 fs/btrfs/extent-tree.c start = max_t(u64, start, SZ_1M); SZ_1M 1181 fs/btrfs/inode.c 5 * SZ_1M) SZ_1M 646 fs/btrfs/space-info.c to_reclaim = min_t(u64, num_online_cpus() * SZ_1M, SZ_16M); SZ_1M 653 fs/btrfs/space-info.c if (can_overcommit(fs_info, space_info, SZ_1M, SZ_1M 1971 fs/btrfs/super.c if (avail_space <= SZ_1M + min_stripe_size) SZ_1M 1974 fs/btrfs/super.c avail_space -= SZ_1M; SZ_1M 225 fs/btrfs/tests/extent-io-tests.c (max_bytes + SZ_1M) >> PAGE_SHIFT); SZ_1M 459 fs/btrfs/tests/extent-io-tests.c set_extent_bits(&tree, SZ_1M, SZ_4M - 1, SZ_1M 465 fs/btrfs/tests/extent-io-tests.c if (start != 0 || end != SZ_1M - 1) { SZ_1M 478 fs/btrfs/tests/extent-io-tests.c find_first_clear_extent_bit(&tree, 12 * SZ_1M, &start, &end, SZ_1M 505 fs/btrfs/tests/extent-io-tests.c find_first_clear_extent_bit(&tree, SZ_64M + SZ_1M, &start, &end, SZ_1M 51 fs/btrfs/tests/free-space-tests.c ret = btrfs_remove_free_space(cache, 3 * SZ_1M, SZ_1M); SZ_1M 57 fs/btrfs/tests/free-space-tests.c ret = btrfs_remove_free_space(cache, 0, SZ_1M); SZ_1M 69 fs/btrfs/tests/free-space-tests.c if (test_check_exists(cache, 0, SZ_1M)) { SZ_1M 79 fs/btrfs/tests/free-space-tests.c if (test_check_exists(cache, 3 * SZ_1M, SZ_1M)) { SZ_1M 121 fs/btrfs/tests/free-space-tests.c ret = btrfs_remove_free_space(cache, SZ_1M, SZ_2M); SZ_1M 142 fs/btrfs/tests/free-space-tests.c ret = btrfs_remove_free_space(cache, next_bitmap_offset - SZ_1M, SZ_2M); SZ_1M 148 fs/btrfs/tests/free-space-tests.c if (test_check_exists(cache, next_bitmap_offset - SZ_1M, SZ_2M)) { SZ_1M 172 fs/btrfs/tests/free-space-tests.c ret = test_add_free_space_entry(cache, SZ_4M, SZ_1M, 1); SZ_1M 178 fs/btrfs/tests/free-space-tests.c ret = test_add_free_space_entry(cache, 0, SZ_1M, 0); SZ_1M 184 fs/btrfs/tests/free-space-tests.c ret = btrfs_remove_free_space(cache, 0, SZ_1M); SZ_1M 190 fs/btrfs/tests/free-space-tests.c if (test_check_exists(cache, 0, SZ_1M)) { SZ_1M 196 fs/btrfs/tests/free-space-tests.c ret = test_add_free_space_entry(cache, 0, SZ_1M, 0); SZ_1M 202 fs/btrfs/tests/free-space-tests.c ret = btrfs_remove_free_space(cache, SZ_4M, SZ_1M); SZ_1M 208 fs/btrfs/tests/free-space-tests.c if (test_check_exists(cache, SZ_4M, SZ_1M)) { SZ_1M 217 fs/btrfs/tests/free-space-tests.c ret = test_add_free_space_entry(cache, SZ_1M, SZ_4M, 1); SZ_1M 223 fs/btrfs/tests/free-space-tests.c ret = btrfs_remove_free_space(cache, SZ_512K, 3 * SZ_1M); SZ_1M 229 fs/btrfs/tests/free-space-tests.c if (test_check_exists(cache, SZ_512K, 3 * SZ_1M)) { SZ_1M 249 fs/btrfs/tests/free-space-tests.c ret = btrfs_remove_free_space(cache, 3 * SZ_1M, SZ_4M); SZ_1M 255 fs/btrfs/tests/free-space-tests.c if (test_check_exists(cache, 3 * SZ_1M, SZ_4M)) { SZ_1M 277 fs/btrfs/tests/free-space-tests.c ret = test_add_free_space_entry(cache, bitmap_offset - SZ_1M, SZ_1M 278 fs/btrfs/tests/free-space-tests.c 5 * SZ_1M, 0); SZ_1M 284 fs/btrfs/tests/free-space-tests.c ret = btrfs_remove_free_space(cache, bitmap_offset + SZ_1M, 5 * SZ_1M); SZ_1M 290 fs/btrfs/tests/free-space-tests.c if (test_check_exists(cache, bitmap_offset + SZ_1M, 5 * SZ_1M)) { SZ_1M 303 fs/btrfs/tests/free-space-tests.c ret = test_add_free_space_entry(cache, SZ_1M, SZ_2M, 1); SZ_1M 309 fs/btrfs/tests/free-space-tests.c ret = test_add_free_space_entry(cache, 3 * SZ_1M, SZ_1M, 0); SZ_1M 315 fs/btrfs/tests/free-space-tests.c ret = btrfs_remove_free_space(cache, SZ_1M, 3 * SZ_1M); SZ_1M 588 fs/btrfs/tests/free-space-tests.c if (!test_check_exists(cache, SZ_128M - SZ_256K, SZ_1M)) { SZ_1M 593 fs/btrfs/tests/free-space-tests.c if (cache->free_space_ctl->free_space != (SZ_1M + sectorsize)) { SZ_1M 599 fs/btrfs/tests/free-space-tests.c 0, SZ_1M, 0, SZ_1M 778 fs/btrfs/tests/free-space-tests.c if (!test_check_exists(cache, SZ_128M - 768 * SZ_1K, SZ_1M)) { SZ_1M 783 fs/btrfs/tests/free-space-tests.c if (cache->free_space_ctl->free_space != (SZ_1M + 2 * sectorsize)) { SZ_1M 788 fs/btrfs/tests/free-space-tests.c offset = btrfs_find_space_for_alloc(cache, 0, SZ_1M, 0, SZ_1M 92 fs/btrfs/tests/inode-tests.c u64 disk_bytenr = SZ_1M; SZ_1M 1620 fs/btrfs/volumes.c search_start = max_t(u64, search_start, SZ_1M); SZ_1M 313 kernel/dma/coherent.c &rmem->base, (unsigned long)rmem->size / SZ_1M); SZ_1M 357 kernel/dma/coherent.c &rmem->base, (unsigned long)rmem->size / SZ_1M); SZ_1M 45 kernel/dma/contiguous.c static const phys_addr_t size_bytes = (phys_addr_t)CMA_SIZE_MBYTES * SZ_1M; SZ_1M 136 kernel/dma/contiguous.c (unsigned long)selected_size / SZ_1M); SZ_1M 331 kernel/dma/contiguous.c &rmem->base, (unsigned long)rmem->size / SZ_1M); SZ_1M 367 mm/cma.c pr_info("Reserved %ld MiB at %pa\n", (unsigned long)size / SZ_1M, SZ_1M 374 mm/cma.c pr_err("Failed to reserve %ld MiB\n", (unsigned long)size / SZ_1M);