SYS_ZCR_EL1       200 arch/arm64/include/asm/fpsimdmacros.h 		mrs_s		x\nxtmp, SYS_ZCR_EL1
SYS_ZCR_EL1       205 arch/arm64/include/asm/fpsimdmacros.h 		msr_s		SYS_ZCR_EL1, \xtmp2	// self-synchronising
SYS_ZCR_EL1       422 arch/arm64/kernel/cpufeature.c 	ARM64_FTR_REG(SYS_ZCR_EL1, ftr_zcr),
SYS_ZCR_EL1       613 arch/arm64/kernel/cpufeature.c 		init_cpu_ftr_reg(SYS_ZCR_EL1, info->reg_zcr);
SYS_ZCR_EL1       781 arch/arm64/kernel/cpufeature.c 		taint |= check_update_ftr_reg(SYS_ZCR_EL1, cpu,
SYS_ZCR_EL1      1950 arch/arm64/kernel/cpufeature.c 	u64 safe_zcr = read_sanitised_ftr_reg(SYS_ZCR_EL1);
SYS_ZCR_EL1       696 arch/arm64/kernel/fpsimd.c 	zcr = read_sysreg_s(SYS_ZCR_EL1) & ~zcr;
SYS_ZCR_EL1       699 arch/arm64/kernel/fpsimd.c 		write_sysreg_s(zcr | (vq - 1), SYS_ZCR_EL1); /* self-syncing */
SYS_ZCR_EL1       831 arch/arm64/kernel/fpsimd.c 	write_sysreg_s(ZCR_ELx_LEN_MASK, SYS_ZCR_EL1);
SYS_ZCR_EL1       833 arch/arm64/kernel/fpsimd.c 	zcr = read_sysreg_s(SYS_ZCR_EL1);
SYS_ZCR_EL1       858 arch/arm64/kernel/fpsimd.c 	zcr = read_sanitised_ftr_reg(SYS_ZCR_EL1);
SYS_ZCR_EL1      1488 arch/arm64/kvm/sys_regs.c 	{ SYS_DESC(SYS_ZCR_EL1), NULL, reset_val, ZCR_EL1, 0, .visibility = sve_visibility },