SYS_ID_ISAR5_EL1  395 arch/arm64/kernel/cpufeature.c 	ARM64_FTR_REG(SYS_ID_ISAR5_EL1, ftr_id_isar5),
SYS_ID_ISAR5_EL1  600 arch/arm64/kernel/cpufeature.c 		init_cpu_ftr_reg(SYS_ID_ISAR5_EL1, info->reg_id_isar5);
SYS_ID_ISAR5_EL1  752 arch/arm64/kernel/cpufeature.c 		taint |= check_update_ftr_reg(SYS_ID_ISAR5_EL1, cpu,
SYS_ID_ISAR5_EL1  831 arch/arm64/kernel/cpufeature.c 	read_sysreg_case(SYS_ID_ISAR5_EL1);
SYS_ID_ISAR5_EL1 1704 arch/arm64/kernel/cpufeature.c 	HWCAP_CAP(SYS_ID_ISAR5_EL1, ID_ISAR5_AES_SHIFT, FTR_UNSIGNED, 2, CAP_COMPAT_HWCAP2, COMPAT_HWCAP2_PMULL),
SYS_ID_ISAR5_EL1 1705 arch/arm64/kernel/cpufeature.c 	HWCAP_CAP(SYS_ID_ISAR5_EL1, ID_ISAR5_AES_SHIFT, FTR_UNSIGNED, 1, CAP_COMPAT_HWCAP2, COMPAT_HWCAP2_AES),
SYS_ID_ISAR5_EL1 1706 arch/arm64/kernel/cpufeature.c 	HWCAP_CAP(SYS_ID_ISAR5_EL1, ID_ISAR5_SHA1_SHIFT, FTR_UNSIGNED, 1, CAP_COMPAT_HWCAP2, COMPAT_HWCAP2_SHA1),
SYS_ID_ISAR5_EL1 1707 arch/arm64/kernel/cpufeature.c 	HWCAP_CAP(SYS_ID_ISAR5_EL1, ID_ISAR5_SHA2_SHIFT, FTR_UNSIGNED, 1, CAP_COMPAT_HWCAP2, COMPAT_HWCAP2_SHA2),
SYS_ID_ISAR5_EL1 1708 arch/arm64/kernel/cpufeature.c 	HWCAP_CAP(SYS_ID_ISAR5_EL1, ID_ISAR5_CRC32_SHIFT, FTR_UNSIGNED, 1, CAP_COMPAT_HWCAP2, COMPAT_HWCAP2_CRC32),