SYSTEM_CONTROL_REG_BASE   71 drivers/media/pci/smipcie/smipcie.h #define MUX_MODE_CTRL         (SYSTEM_CONTROL_REG_BASE + 0x00)
SYSTEM_CONTROL_REG_BASE   87 drivers/media/pci/smipcie/smipcie.h #define INTERNAL_RST                (SYSTEM_CONTROL_REG_BASE + 0x04)
SYSTEM_CONTROL_REG_BASE   88 drivers/media/pci/smipcie/smipcie.h #define PERIPHERAL_CTRL             (SYSTEM_CONTROL_REG_BASE + 0x08)
SYSTEM_CONTROL_REG_BASE   89 drivers/media/pci/smipcie/smipcie.h #define GPIO_0to7_CTRL              (SYSTEM_CONTROL_REG_BASE + 0x0C)
SYSTEM_CONTROL_REG_BASE   90 drivers/media/pci/smipcie/smipcie.h #define GPIO_8to15_CTRL             (SYSTEM_CONTROL_REG_BASE + 0x10)
SYSTEM_CONTROL_REG_BASE   91 drivers/media/pci/smipcie/smipcie.h #define GPIO_16to24_CTRL            (SYSTEM_CONTROL_REG_BASE + 0x14)
SYSTEM_CONTROL_REG_BASE   92 drivers/media/pci/smipcie/smipcie.h #define GPIO_INT_SRC_CFG            (SYSTEM_CONTROL_REG_BASE + 0x18)
SYSTEM_CONTROL_REG_BASE   93 drivers/media/pci/smipcie/smipcie.h #define SYS_BUF_STATUS              (SYSTEM_CONTROL_REG_BASE + 0x1C)
SYSTEM_CONTROL_REG_BASE   94 drivers/media/pci/smipcie/smipcie.h #define PCIE_IP_REG_ACS             (SYSTEM_CONTROL_REG_BASE + 0x20)
SYSTEM_CONTROL_REG_BASE   95 drivers/media/pci/smipcie/smipcie.h #define PCIE_IP_REG_ACS_ADDR        (SYSTEM_CONTROL_REG_BASE + 0x24)
SYSTEM_CONTROL_REG_BASE   96 drivers/media/pci/smipcie/smipcie.h #define PCIE_IP_REG_ACS_DATA        (SYSTEM_CONTROL_REG_BASE + 0x28)