SW_MODE           157 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 			SW_MODE, info->gfx9.swizzle,
SW_MODE           999 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 			SW_MODE, &s->sw_mode);
SW_MODE           257 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h 	HUBP_SF(HUBP0_DCSURF_TILING_CONFIG, SW_MODE, mask_sh),\
SW_MODE           444 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h 	type SW_MODE;\
SW_MODE           316 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c 			SW_MODE, info->gfx9.swizzle,
SW_MODE          1197 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c 			SW_MODE, &s->sw_mode);
SW_MODE           231 drivers/mtd/devices/spear_smi.c 	writel(ctrlreg1 & ~(SW_MODE | WB_MODE), dev->io_base + SMI_CR1);
SW_MODE           389 drivers/mtd/devices/spear_smi.c 	writel(ctrlreg1 & ~SW_MODE, dev->io_base + SMI_CR1);
SW_MODE           461 drivers/mtd/devices/spear_smi.c 	writel((ctrlreg1 | SW_MODE) & ~WB_MODE, dev->io_base + SMI_CR1);
SW_MODE           577 drivers/mtd/devices/spear_smi.c 	val &= ~(SW_MODE | WB_MODE);
SW_MODE           635 drivers/mtd/devices/spear_smi.c 	writel((ctrlreg1 | WB_MODE) & ~SW_MODE, dev->io_base + SMI_CR1);
SW_MODE           759 drivers/mtd/devices/spear_smi.c 	writel(val | SW_MODE, dev->io_base + SMI_CR1);
SW_MODE           784 drivers/mtd/devices/spear_smi.c 	writel(val & ~SW_MODE, dev->io_base + SMI_CR1);