SW                 43 arch/ia64/kernel/entry.h 	.savesp ar.unat,SW(CALLER_UNAT)+16+(off);				\
SW                 44 arch/ia64/kernel/entry.h 	.savesp ar.fpsr,SW(AR_FPSR)+16+(off);					\
SW                 45 arch/ia64/kernel/entry.h 	.spillsp f2,SW(F2)+16+(off); .spillsp f3,SW(F3)+16+(off);		\
SW                 46 arch/ia64/kernel/entry.h 	.spillsp f4,SW(F4)+16+(off); .spillsp f5,SW(F5)+16+(off);		\
SW                 47 arch/ia64/kernel/entry.h 	.spillsp f16,SW(F16)+16+(off); .spillsp f17,SW(F17)+16+(off);		\
SW                 48 arch/ia64/kernel/entry.h 	.spillsp f18,SW(F18)+16+(off); .spillsp f19,SW(F19)+16+(off);		\
SW                 49 arch/ia64/kernel/entry.h 	.spillsp f20,SW(F20)+16+(off); .spillsp f21,SW(F21)+16+(off);		\
SW                 50 arch/ia64/kernel/entry.h 	.spillsp f22,SW(F22)+16+(off); .spillsp f23,SW(F23)+16+(off);		\
SW                 51 arch/ia64/kernel/entry.h 	.spillsp f24,SW(F24)+16+(off); .spillsp f25,SW(F25)+16+(off);		\
SW                 52 arch/ia64/kernel/entry.h 	.spillsp f26,SW(F26)+16+(off); .spillsp f27,SW(F27)+16+(off);		\
SW                 53 arch/ia64/kernel/entry.h 	.spillsp f28,SW(F28)+16+(off); .spillsp f29,SW(F29)+16+(off);		\
SW                 54 arch/ia64/kernel/entry.h 	.spillsp f30,SW(F30)+16+(off); .spillsp f31,SW(F31)+16+(off);		\
SW                 55 arch/ia64/kernel/entry.h 	.spillsp r4,SW(R4)+16+(off); .spillsp r5,SW(R5)+16+(off);		\
SW                 56 arch/ia64/kernel/entry.h 	.spillsp r6,SW(R6)+16+(off); .spillsp r7,SW(R7)+16+(off);		\
SW                 57 arch/ia64/kernel/entry.h 	.spillsp b0,SW(B0)+16+(off); .spillsp b1,SW(B1)+16+(off);		\
SW                 58 arch/ia64/kernel/entry.h 	.spillsp b2,SW(B2)+16+(off); .spillsp b3,SW(B3)+16+(off);		\
SW                 59 arch/ia64/kernel/entry.h 	.spillsp b4,SW(B4)+16+(off); .spillsp b5,SW(B5)+16+(off);		\
SW                 60 arch/ia64/kernel/entry.h 	.spillsp ar.pfs,SW(AR_PFS)+16+(off); .spillsp ar.lc,SW(AR_LC)+16+(off);	\
SW                 61 arch/ia64/kernel/entry.h 	.spillsp @priunat,SW(AR_UNAT)+16+(off);					\
SW                 62 arch/ia64/kernel/entry.h 	.spillsp ar.rnat,SW(AR_RNAT)+16+(off);					\
SW                 63 arch/ia64/kernel/entry.h 	.spillsp ar.bspstore,SW(AR_BSPSTORE)+16+(off);				\
SW                 64 arch/ia64/kernel/entry.h 	.spillsp pr,SW(PR)+16+(off)
SW               2253 arch/ia64/kernel/unwind.c 	unw.sw_off[unw.preg_index[UNW_REG_PRI_UNAT_GR]] = SW(CALLER_UNAT);
SW               2254 arch/ia64/kernel/unwind.c 	unw.sw_off[unw.preg_index[UNW_REG_BSPSTORE]] = SW(AR_BSPSTORE);
SW               2255 arch/ia64/kernel/unwind.c 	unw.sw_off[unw.preg_index[UNW_REG_PFS]] = SW(AR_PFS);
SW               2256 arch/ia64/kernel/unwind.c 	unw.sw_off[unw.preg_index[UNW_REG_RP]] = SW(B0);
SW               2257 arch/ia64/kernel/unwind.c 	unw.sw_off[unw.preg_index[UNW_REG_UNAT]] = SW(CALLER_UNAT);
SW               2258 arch/ia64/kernel/unwind.c 	unw.sw_off[unw.preg_index[UNW_REG_PR]] = SW(PR);
SW               2259 arch/ia64/kernel/unwind.c 	unw.sw_off[unw.preg_index[UNW_REG_LC]] = SW(AR_LC);
SW               2260 arch/ia64/kernel/unwind.c 	unw.sw_off[unw.preg_index[UNW_REG_FPSR]] = SW(AR_FPSR);
SW               2261 arch/ia64/kernel/unwind.c 	for (i = UNW_REG_R4, off = SW(R4); i <= UNW_REG_R7; ++i, off += 8)
SW               2263 arch/ia64/kernel/unwind.c 	for (i = UNW_REG_B1, off = SW(B1); i <= UNW_REG_B5; ++i, off += 8)
SW               2265 arch/ia64/kernel/unwind.c 	for (i = UNW_REG_F2, off = SW(F2); i <= UNW_REG_F5; ++i, off += 16)
SW               2267 arch/ia64/kernel/unwind.c 	for (i = UNW_REG_F16, off = SW(F16); i <= UNW_REG_F31; ++i, off += 16)
SW                 40 arch/parisc/include/asm/floppy.h #define fd_get_dma_residue()    SW._get_dma_residue(FLOPPY_DMA)
SW                 41 arch/parisc/include/asm/floppy.h #define fd_dma_mem_alloc(size)	SW._dma_mem_alloc(size)
SW                 42 arch/parisc/include/asm/floppy.h #define fd_dma_setup(addr, size, mode, io) SW._dma_setup(addr, size, mode, io)
SW                230 arch/powerpc/kernel/align.c 	if (flags & SW) {
SW                 42 arch/x86/include/asm/floppy.h #define fd_get_dma_residue()	SW._get_dma_residue(FLOPPY_DMA)
SW                 43 arch/x86/include/asm/floppy.h #define fd_dma_mem_alloc(size)	SW._dma_mem_alloc(size)
SW                 44 arch/x86/include/asm/floppy.h #define fd_dma_setup(addr, size, mode, io) SW._dma_setup(addr, size, mode, io)
SW                 57 drivers/clk/bcm/clk-kona.h #define gate_is_sw_controllable(gate)	FLAG_TEST(gate, GATE, SW)
SW                165 drivers/clk/bcm/clk-kona.h 		.flags = FLAG(GATE, HW)|FLAG(GATE, SW)|			\
SW                177 drivers/clk/bcm/clk-kona.h 		.flags = FLAG(GATE, HW)|FLAG(GATE, SW)|			\
SW                188 drivers/clk/bcm/clk-kona.h 		.flags = FLAG(GATE, HW)|FLAG(GATE, SW)|			\
SW                198 drivers/clk/bcm/clk-kona.h 		.flags = FLAG(GATE, SW)|FLAG(GATE, SW_MANAGED)|		\
SW               2715 drivers/gpu/drm/nouveau/nvkm/engine/device/base.c 	_(SW     , device->sw      , &device->sw->engine);
SW                 79 drivers/gpu/drm/nouveau/nvkm/engine/device/user.c 	case ENGINE_A(SW    ); break;
SW               1745 drivers/infiniband/hw/qib/qib_iba6120.c 		 (unsigned int)SYM_FIELD(dd->revision, Revision_R, SW));
SW               2058 drivers/infiniband/hw/qib/qib_iba7220.c 		 (unsigned int)SYM_FIELD(dd->revision, Revision_R, SW));
SW               3611 drivers/infiniband/hw/qib/qib_iba7322.c 		 (unsigned int)SYM_FIELD(dd->revision, Revision_R, SW));
SW               1512 drivers/input/input.c INPUT_DEV_CAP_ATTR(SW, sw);
SW               2081 drivers/input/input.c 	INPUT_CLEANSE_BITMASK(dev, SW, sw);
SW                835 drivers/regulator/axp20x-regulator.c 	AXP_DESC_SW(AXP806, SW, "sw", "swin",
SW                916 drivers/regulator/axp20x-regulator.c 	AXP_DESC_SW(AXP809, SW, "sw", "swin",
SW               1001 drivers/regulator/axp20x-regulator.c 	AXP_DESC_SW(AXP813, SW, "sw", "swin",
SW                104 drivers/regulator/mc13xxx.h 	MC13xxx_DEFINE(SW, _name, _node, _reg, _vsel_reg, _voltages, ops)