BDW_DSP_BAR 55 sound/soc/sof/intel/bdw.c {"dmac0", BDW_DSP_BAR, DMAC0_OFFSET, DMAC_SIZE, BDW_DSP_BAR 57 sound/soc/sof/intel/bdw.c {"dmac1", BDW_DSP_BAR, DMAC1_OFFSET, DMAC_SIZE, BDW_DSP_BAR 59 sound/soc/sof/intel/bdw.c {"ssp0", BDW_DSP_BAR, SSP0_OFFSET, SSP_SIZE, BDW_DSP_BAR 61 sound/soc/sof/intel/bdw.c {"ssp1", BDW_DSP_BAR, SSP1_OFFSET, SSP_SIZE, BDW_DSP_BAR 63 sound/soc/sof/intel/bdw.c {"iram", BDW_DSP_BAR, IRAM_OFFSET, BDW_IRAM_SIZE, BDW_DSP_BAR 65 sound/soc/sof/intel/bdw.c {"dram", BDW_DSP_BAR, DRAM_OFFSET, BDW_DRAM_SIZE, BDW_DSP_BAR 67 sound/soc/sof/intel/bdw.c {"shim", BDW_DSP_BAR, SHIM_OFFSET, SHIM_SIZE, BDW_DSP_BAR 82 sound/soc/sof/intel/bdw.c snd_sof_dsp_update_bits(sdev, BDW_DSP_BAR, SHIM_HMDC, BDW_DSP_BAR 87 sound/soc/sof/intel/bdw.c snd_sof_dsp_update_bits_unlocked(sdev, BDW_DSP_BAR, SHIM_CSR, BDW_DSP_BAR 97 sound/soc/sof/intel/bdw.c snd_sof_dsp_update_bits_unlocked(sdev, BDW_DSP_BAR, SHIM_CSR, BDW_DSP_BAR 105 sound/soc/sof/intel/bdw.c snd_sof_dsp_update_bits_unlocked(sdev, BDW_DSP_BAR, SHIM_CSR, BDW_DSP_BAR 147 sound/soc/sof/intel/bdw.c snd_sof_dsp_update_bits_unlocked(sdev, BDW_DSP_BAR, SHIM_CSR, BDW_DSP_BAR 152 sound/soc/sof/intel/bdw.c snd_sof_dsp_update_bits_unlocked(sdev, BDW_DSP_BAR, BDW_DSP_BAR 159 sound/soc/sof/intel/bdw.c snd_sof_dsp_update_bits_unlocked(sdev, BDW_DSP_BAR, SHIM_CLKCTL, BDW_DSP_BAR 192 sound/soc/sof/intel/bdw.c snd_sof_dsp_update_bits_unlocked(sdev, BDW_DSP_BAR, SHIM_CSR2, BDW_DSP_BAR 197 sound/soc/sof/intel/bdw.c snd_sof_dsp_update_bits(sdev, BDW_DSP_BAR, SHIM_HMDC, BDW_DSP_BAR 204 sound/soc/sof/intel/bdw.c snd_sof_dsp_update_bits(sdev, BDW_DSP_BAR, SHIM_IMRX, BDW_DSP_BAR 206 sound/soc/sof/intel/bdw.c snd_sof_dsp_update_bits(sdev, BDW_DSP_BAR, SHIM_IMRD, BDW_DSP_BAR 211 sound/soc/sof/intel/bdw.c snd_sof_dsp_write(sdev, BDW_DSP_BAR, SHIM_IPCX, 0x0); BDW_DSP_BAR 212 sound/soc/sof/intel/bdw.c snd_sof_dsp_write(sdev, BDW_DSP_BAR, SHIM_IPCD, 0x0); BDW_DSP_BAR 213 sound/soc/sof/intel/bdw.c snd_sof_dsp_write(sdev, BDW_DSP_BAR, 0x80, 0x6); BDW_DSP_BAR 214 sound/soc/sof/intel/bdw.c snd_sof_dsp_write(sdev, BDW_DSP_BAR, 0xe0, 0x300a); BDW_DSP_BAR 253 sound/soc/sof/intel/bdw.c status = snd_sof_dsp_read(sdev, BDW_DSP_BAR, SHIM_IPCD); BDW_DSP_BAR 254 sound/soc/sof/intel/bdw.c panic = snd_sof_dsp_read(sdev, BDW_DSP_BAR, SHIM_IPCX); BDW_DSP_BAR 272 sound/soc/sof/intel/bdw.c isr = snd_sof_dsp_read(sdev, BDW_DSP_BAR, SHIM_ISRX); BDW_DSP_BAR 284 sound/soc/sof/intel/bdw.c imrx = snd_sof_dsp_read64(sdev, BDW_DSP_BAR, SHIM_IMRX); BDW_DSP_BAR 285 sound/soc/sof/intel/bdw.c ipcx = snd_sof_dsp_read(sdev, BDW_DSP_BAR, SHIM_IPCX); BDW_DSP_BAR 291 sound/soc/sof/intel/bdw.c snd_sof_dsp_update_bits_unlocked(sdev, BDW_DSP_BAR, BDW_DSP_BAR 312 sound/soc/sof/intel/bdw.c ipcd = snd_sof_dsp_read(sdev, BDW_DSP_BAR, SHIM_IPCD); BDW_DSP_BAR 318 sound/soc/sof/intel/bdw.c snd_sof_dsp_update_bits_unlocked(sdev, BDW_DSP_BAR, BDW_DSP_BAR 345 sound/soc/sof/intel/bdw.c snd_sof_dsp_write(sdev, BDW_DSP_BAR, SHIM_IPCX, SHIM_IPCX_BUSY); BDW_DSP_BAR 402 sound/soc/sof/intel/bdw.c snd_sof_dsp_update_bits_unlocked(sdev, BDW_DSP_BAR, SHIM_IPCD, BDW_DSP_BAR 407 sound/soc/sof/intel/bdw.c snd_sof_dsp_update_bits_unlocked(sdev, BDW_DSP_BAR, SHIM_IMRX, BDW_DSP_BAR 414 sound/soc/sof/intel/bdw.c snd_sof_dsp_update_bits_unlocked(sdev, BDW_DSP_BAR, SHIM_IPCX, BDW_DSP_BAR 418 sound/soc/sof/intel/bdw.c snd_sof_dsp_update_bits_unlocked(sdev, BDW_DSP_BAR, SHIM_IMRX, BDW_DSP_BAR 448 sound/soc/sof/intel/bdw.c sdev->bar[BDW_DSP_BAR] = devm_ioremap(sdev->dev, base, size); BDW_DSP_BAR 449 sound/soc/sof/intel/bdw.c if (!sdev->bar[BDW_DSP_BAR]) { BDW_DSP_BAR 455 sound/soc/sof/intel/bdw.c dev_dbg(sdev->dev, "LPE VADDR %p\n", sdev->bar[BDW_DSP_BAR]); BDW_DSP_BAR 458 sound/soc/sof/intel/bdw.c sdev->mmio_bar = BDW_DSP_BAR; BDW_DSP_BAR 459 sound/soc/sof/intel/bdw.c sdev->mailbox_bar = BDW_DSP_BAR;