STBCR7             93 arch/sh/kernel/cpu/sh2a/clock-sh7264.c 	[MSTP77] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR7, 7, 0), /* SCIF */
STBCR7             94 arch/sh/kernel/cpu/sh2a/clock-sh7264.c 	[MSTP74] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR7, 4, 0), /* VDC */
STBCR7             95 arch/sh/kernel/cpu/sh2a/clock-sh7264.c 	[MSTP72] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR7, 2, 0), /* CMT */
STBCR7            123 arch/sh/kernel/cpu/sh2a/clock-sh7269.c 	[MSTP72] = SH_CLK_MSTP8(&peripheral0_clk, STBCR7, 2, 0), /* CMT */