STBCR4            125 arch/sh/kernel/cpu/sh2a/clock-sh7269.c 	[MSTP47] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 7, 0), /* SCIF0 */
STBCR4            126 arch/sh/kernel/cpu/sh2a/clock-sh7269.c 	[MSTP46] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 6, 0), /* SCIF1 */
STBCR4            127 arch/sh/kernel/cpu/sh2a/clock-sh7269.c 	[MSTP45] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 5, 0), /* SCIF2 */
STBCR4            128 arch/sh/kernel/cpu/sh2a/clock-sh7269.c 	[MSTP44] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 4, 0), /* SCIF3 */
STBCR4            129 arch/sh/kernel/cpu/sh2a/clock-sh7269.c 	[MSTP43] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 3, 0), /* SCIF4 */
STBCR4            130 arch/sh/kernel/cpu/sh2a/clock-sh7269.c 	[MSTP42] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 2, 0), /* SCIF5 */
STBCR4            131 arch/sh/kernel/cpu/sh2a/clock-sh7269.c 	[MSTP41] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 1, 0), /* SCIF6 */
STBCR4            132 arch/sh/kernel/cpu/sh2a/clock-sh7269.c 	[MSTP40] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 0, 0), /* SCIF7 */
STBCR4            347 arch/sh/kernel/cpu/sh2a/setup-sh7203.c 	__raw_writeb(__raw_readb(STBCR4) & ~0x04, STBCR4);
STBCR4            283 arch/sh/kernel/cpu/sh2a/setup-sh7206.c 	__raw_writeb(__raw_readb(STBCR4) & ~0x04, STBCR4);