SSPP_NONE         378 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 	ot_params.num = pdpu->pipe_hw->idx - SSPP_NONE;
SSPP_NONE        1445 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 	return plane ? to_dpu_plane(plane)->pipe : SSPP_NONE;
SSPP_NONE         538 drivers/gpu/drm/msm/disp/mdp5/mdp5.xml.h 		case SSPP_NONE: return (INVALID_IDX(idx));
SSPP_NONE         227 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 	enum mdp5_pipe stage[STAGE_MAX + 1][MAX_PIPE_STAGE] = { { SSPP_NONE } };
SSPP_NONE         228 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 	enum mdp5_pipe r_stage[STAGE_MAX + 1][MAX_PIPE_STAGE] = { { SSPP_NONE } };
SSPP_NONE        1034 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c 		return SSPP_NONE;
SSPP_NONE        1044 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c 		return SSPP_NONE;