BCM_6368_HIGH_IRQ_BASE 995 arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h #define BCM_6368_ENETSW_RXDMA0_IRQ (BCM_6368_HIGH_IRQ_BASE + 0) BCM_6368_HIGH_IRQ_BASE 996 arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h #define BCM_6368_ENETSW_RXDMA1_IRQ (BCM_6368_HIGH_IRQ_BASE + 1) BCM_6368_HIGH_IRQ_BASE 997 arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h #define BCM_6368_ENETSW_RXDMA2_IRQ (BCM_6368_HIGH_IRQ_BASE + 2) BCM_6368_HIGH_IRQ_BASE 998 arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h #define BCM_6368_ENETSW_RXDMA3_IRQ (BCM_6368_HIGH_IRQ_BASE + 3) BCM_6368_HIGH_IRQ_BASE 999 arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h #define BCM_6368_ENETSW_TXDMA0_IRQ (BCM_6368_HIGH_IRQ_BASE + 4) BCM_6368_HIGH_IRQ_BASE 1000 arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h #define BCM_6368_ENETSW_TXDMA1_IRQ (BCM_6368_HIGH_IRQ_BASE + 5) BCM_6368_HIGH_IRQ_BASE 1001 arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h #define BCM_6368_ENETSW_TXDMA2_IRQ (BCM_6368_HIGH_IRQ_BASE + 6) BCM_6368_HIGH_IRQ_BASE 1002 arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h #define BCM_6368_ENETSW_TXDMA3_IRQ (BCM_6368_HIGH_IRQ_BASE + 7) BCM_6368_HIGH_IRQ_BASE 1004 arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h #define BCM_6368_XTM_DMA0_IRQ (BCM_6368_HIGH_IRQ_BASE + 8) BCM_6368_HIGH_IRQ_BASE 1006 arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h #define BCM_6368_PCM_DMA0_IRQ (BCM_6368_HIGH_IRQ_BASE + 30) BCM_6368_HIGH_IRQ_BASE 1007 arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h #define BCM_6368_PCM_DMA1_IRQ (BCM_6368_HIGH_IRQ_BASE + 31)