SRI2               58 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(WB_ENABLE, CNV, inst),\
SRI2               59 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(WB_EC_CONFIG, CNV, inst),\
SRI2               60 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(CNV_MODE, CNV, inst),\
SRI2               61 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(CNV_WINDOW_START, CNV, inst),\
SRI2               62 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(CNV_WINDOW_SIZE, CNV, inst),\
SRI2               63 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(CNV_UPDATE, CNV, inst),\
SRI2               64 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(CNV_SOURCE_SIZE, CNV, inst),\
SRI2               65 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(CNV_TEST_CNTL, CNV, inst),\
SRI2               66 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(CNV_TEST_CRC_RED, CNV, inst),\
SRI2               67 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(CNV_TEST_CRC_GREEN, CNV, inst),\
SRI2               68 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(CNV_TEST_CRC_BLUE, CNV, inst),\
SRI2               69 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(WBSCL_COEF_RAM_SELECT, WBSCL, inst),\
SRI2               70 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(WBSCL_COEF_RAM_TAP_DATA, WBSCL, inst),\
SRI2               71 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(WBSCL_MODE, WBSCL, inst),\
SRI2               72 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(WBSCL_TAP_CONTROL, WBSCL, inst),\
SRI2               73 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(WBSCL_DEST_SIZE, WBSCL, inst),\
SRI2               74 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(WBSCL_HORZ_FILTER_SCALE_RATIO, WBSCL, inst),\
SRI2               75 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(WBSCL_HORZ_FILTER_INIT_Y_RGB, WBSCL, inst),\
SRI2               76 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(WBSCL_HORZ_FILTER_INIT_CBCR, WBSCL, inst),\
SRI2               77 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(WBSCL_VERT_FILTER_SCALE_RATIO, WBSCL, inst),\
SRI2               78 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(WBSCL_VERT_FILTER_INIT_Y_RGB, WBSCL, inst),\
SRI2               79 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(WBSCL_VERT_FILTER_INIT_CBCR, WBSCL, inst),\
SRI2               80 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(WBSCL_ROUND_OFFSET, WBSCL, inst),\
SRI2               81 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(WBSCL_OVERFLOW_STATUS, WBSCL, inst),\
SRI2               82 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(WBSCL_COEF_RAM_CONFLICT_STATUS, WBSCL, inst),\
SRI2               83 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(WBSCL_TEST_CNTL, WBSCL, inst),\
SRI2               84 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(WBSCL_TEST_CRC_RED, WBSCL, inst),\
SRI2               85 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(WBSCL_TEST_CRC_GREEN, WBSCL, inst),\
SRI2               86 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(WBSCL_TEST_CRC_BLUE, WBSCL, inst),\
SRI2               87 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(WBSCL_BACKPRESSURE_CNT_EN, WBSCL, inst),\
SRI2               88 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(WB_MCIF_BACKPRESSURE_CNT, WBSCL, inst),\
SRI2               89 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(WBSCL_CLAMP_Y_RGB, WBSCL, inst),\
SRI2               90 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(WBSCL_CLAMP_CBCR, WBSCL, inst),\
SRI2               91 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(WBSCL_OUTSIDE_PIX_STRATEGY, WBSCL, inst),\
SRI2               92 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(WBSCL_OUTSIDE_PIX_STRATEGY_CBCR, WBSCL, inst),\
SRI2               93 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(WBSCL_DEBUG, WBSCL, inst),\
SRI2               94 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(WBSCL_TEST_DEBUG_INDEX, WBSCL, inst),\
SRI2               95 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(WBSCL_TEST_DEBUG_DATA, WBSCL, inst),\
SRI2               96 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(WB_DEBUG_CTRL, CNV, inst),\
SRI2               97 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(WB_DBG_MODE, CNV, inst),\
SRI2               98 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(WB_HW_DEBUG, CNV, inst),\
SRI2               99 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(CNV_TEST_DEBUG_INDEX, CNV, inst),\
SRI2              100 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(CNV_TEST_DEBUG_DATA, CNV, inst),\
SRI2              101 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(WB_SOFT_RESET, CNV, inst),\
SRI2              102 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(WB_WARM_UP_MODE_CTL1, CNV, inst),\
SRI2              103 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h 	SRI2(WB_WARM_UP_MODE_CTL2, CNV, inst)