SRCC1 168 arch/sh/kernel/cpu/sh2a/setup-sh7264.c INTC_IRQ(SRCC1, 304), INTC_IRQ(SRCC1, 305), SRCC1 169 arch/sh/kernel/cpu/sh2a/setup-sh7264.c INTC_IRQ(SRCC1, 306), INTC_IRQ(SRCC1, 307), SRCC1 170 arch/sh/kernel/cpu/sh2a/setup-sh7264.c INTC_IRQ(SRCC1, 308), SRCC1 213 arch/sh/kernel/cpu/sh2a/setup-sh7264.c { 0xfffe0c20, 0, 16, 4, /* IPR22 */ { SRCC0, SRCC1, 0, DCOMU } }, SRCC1 185 arch/sh/kernel/cpu/sh2a/setup-sh7269.c INTC_IRQ(SRCC1, 346), INTC_IRQ(SRCC1, 347), SRCC1 186 arch/sh/kernel/cpu/sh2a/setup-sh7269.c INTC_IRQ(SRCC1, 348), INTC_IRQ(SRCC1, 349), SRCC1 187 arch/sh/kernel/cpu/sh2a/setup-sh7269.c INTC_IRQ(SRCC1, 350), SRCC1 235 arch/sh/kernel/cpu/sh2a/setup-sh7269.c { 0xfffe0c28, 0, 16, 4, /* IPR26 */ { SRCC0, SRCC1, SRCC2, 0 } },