SR1E 54 drivers/video/fbdev/via/dvi.c sr1e = viafb_read_reg(VIASR, SR1E); SR1E 55 drivers/video/fbdev/via/dvi.c viafb_write_reg_mask(SR1E, VIASR, 0xC0, BIT6 + BIT7); SR1E 60 drivers/video/fbdev/via/dvi.c sr1e = viafb_read_reg(VIASR, SR1E); SR1E 61 drivers/video/fbdev/via/dvi.c viafb_write_reg_mask(SR1E, VIASR, 0xF0, BIT4 + SR1E 119 drivers/video/fbdev/via/dvi.c viafb_write_reg(SR1E, VIASR, sr1e); SR1E 123 drivers/video/fbdev/via/dvi.c viafb_write_reg(SR1E, VIASR, sr1e); SR1E 189 drivers/video/fbdev/via/dvi.c RegSR1E = viafb_read_reg(VIASR, SR1E); SR1E 190 drivers/video/fbdev/via/dvi.c viafb_write_reg(SR1E, VIASR, RegSR1E | 0x30); SR1E 209 drivers/video/fbdev/via/dvi.c RegSR1E = viafb_read_reg(VIASR, SR1E); SR1E 210 drivers/video/fbdev/via/dvi.c viafb_write_reg(SR1E, VIASR, RegSR1E | 0xF0); SR1E 238 drivers/video/fbdev/via/dvi.c viafb_write_reg(SR1E, VIASR, RegSR1E); SR1E 2057 drivers/video/fbdev/via/hw.c viafb_write_reg_mask(SR1E, VIASR, SR1E 706 drivers/video/fbdev/via/lcd.c viafb_write_reg_mask(SR1E, VIASR, 0x00, 0x30); SR1E 771 drivers/video/fbdev/via/lcd.c viafb_write_reg_mask(SR1E, VIASR, 0x30, 0x30); SR1E 1118 drivers/video/fbdev/via/viafbdev.c (viafb_read_reg(VIASR, SR1E) & BIT2) >> 2; SR1E 1163 drivers/video/fbdev/via/viafbdev.c viafb_write_reg_mask(SR1E, VIASR, SR1E 17 drivers/video/fbdev/via/viamode.c {VIASR, SR1E, 0x0F, 0x01}, SR1E 52 drivers/video/fbdev/via/viamode.c {VIASR, SR1E, 0xFF, 0x01}, SR1E 101 drivers/video/fbdev/via/viamode.c {VIASR, SR1E, 0xFF, 0x01}, /* Power Management Control */ SR1E 138 drivers/video/fbdev/via/viamode.c {VIASR, SR1E, 0xFF, 0x01}, SR1E 174 drivers/video/fbdev/via/viamode.c {VIASR, SR1E, 0x07, 0x01}, SR1E 200 drivers/video/fbdev/via/viamode.c struct io_reg CLE266_ModeXregs[] = { {VIASR, SR1E, 0xF0, 0x00},