SPRN_HID0 1459 arch/powerpc/include/asm/reg.h asm volatile("sync; mtspr %0,%1; isync":: "i"(SPRN_HID0), "r"(hid0)); SPRN_HID0 82 arch/powerpc/kernel/pmc.c hid0 = mfspr(SPRN_HID0); SPRN_HID0 95 arch/powerpc/kernel/pmc.c "isync" : "=&r" (hid0) : "i" (SPRN_HID0), "0" (hid0): SPRN_HID0 616 arch/powerpc/kernel/sysfs.c SYSFS_SPRSETUP(hid0, SPRN_HID0); SPRN_HID0 715 arch/powerpc/kvm/book3s_emulate.c case SPRN_HID0: SPRN_HID0 898 arch/powerpc/kvm/book3s_emulate.c case SPRN_HID0: SPRN_HID0 3209 arch/powerpc/kvm/book3s_hv.c unsigned long hid0 = mfspr(SPRN_HID0); SPRN_HID0 3213 arch/powerpc/kvm/book3s_hv.c mtspr(SPRN_HID0, hid0); SPRN_HID0 3216 arch/powerpc/kvm/book3s_hv.c hid0 = mfspr(SPRN_HID0); SPRN_HID0 3325 arch/powerpc/kvm/book3s_hv.c unsigned long hid0 = mfspr(SPRN_HID0); SPRN_HID0 3331 arch/powerpc/kvm/book3s_hv.c mtspr(SPRN_HID0, hid0); SPRN_HID0 3334 arch/powerpc/kvm/book3s_hv.c hid0 = mfspr(SPRN_HID0); SPRN_HID0 257 arch/powerpc/kvm/e500_emulate.c case SPRN_HID0: SPRN_HID0 385 arch/powerpc/kvm/e500_emulate.c case SPRN_HID0: SPRN_HID0 151 arch/powerpc/platforms/52xx/mpc52xx_pm.c hid0 = mfspr(SPRN_HID0); SPRN_HID0 152 arch/powerpc/platforms/52xx/mpc52xx_pm.c mtspr(SPRN_HID0, (hid0 & ~(HID0_DOZE | HID0_NAP | HID0_DPM)) | HID0_SLEEP); SPRN_HID0 168 arch/powerpc/platforms/52xx/mpc52xx_pm.c mtspr(SPRN_HID0, hid0); SPRN_HID0 34 arch/powerpc/platforms/85xx/mpc85xx_pm_ops.c tmp = (mfspr(SPRN_HID0) & ~(HID0_DOZE|HID0_SLEEP)) | HID0_NAP; SPRN_HID0 35 arch/powerpc/platforms/85xx/mpc85xx_pm_ops.c mtspr(SPRN_HID0, tmp); SPRN_HID0 34 arch/powerpc/platforms/86xx/common.c temp = mfspr(SPRN_HID0); SPRN_HID0 36 arch/powerpc/platforms/86xx/common.c mtspr(SPRN_HID0, temp); SPRN_HID0 334 arch/powerpc/platforms/cell/ras.c hid0 = mfspr(SPRN_HID0); SPRN_HID0 337 arch/powerpc/platforms/cell/ras.c mtspr(SPRN_HID0, hid0); SPRN_HID0 75 arch/powerpc/platforms/powernv/idle.c uint64_t hid0_val = mfspr(SPRN_HID0); SPRN_HID0 114 arch/powerpc/platforms/powernv/idle.c rc = opal_slw_set_reg(pir, SPRN_HID0, hid0_val); SPRN_HID0 168 arch/powerpc/platforms/powernv/subcore.c opal_slw_set_reg(cpu_pir, SPRN_HID0, hid0); SPRN_HID0 181 arch/powerpc/platforms/powernv/subcore.c while (mfspr(SPRN_HID0) & mask) SPRN_HID0 188 arch/powerpc/platforms/powernv/subcore.c hid0 = mfspr(SPRN_HID0); SPRN_HID0 193 arch/powerpc/platforms/powernv/subcore.c while (mfspr(SPRN_HID0) & mask) SPRN_HID0 225 arch/powerpc/platforms/powernv/subcore.c hid0 = mfspr(SPRN_HID0); SPRN_HID0 231 arch/powerpc/platforms/powernv/subcore.c while (!(mfspr(SPRN_HID0) & split_parms[i].mask)) SPRN_HID0 2084 drivers/macintosh/via-pmu.c hid0 = mfspr(SPRN_HID0); SPRN_HID0 2086 drivers/macintosh/via-pmu.c mtspr(SPRN_HID0, hid0);