SPR               659 arch/powerpc/xmon/ppc-opc.c #define PMR SPR
SPR               660 arch/powerpc/xmon/ppc-opc.c #define TMR SPR
SPR               665 arch/powerpc/xmon/ppc-opc.c #define SPRBAT SPR + 1
SPR              5180 arch/powerpc/xmon/ppc-opc.c {"mfdcr",	X(31,323), X_MASK, PPC403|BOOKE|PPCA2|PPC476, E500|TITAN, {RT, SPR}},
SPR              5181 arch/powerpc/xmon/ppc-opc.c {"mfdcr.",	XRC(31,323,1),	X_MASK,	     PPCA2,	0,		{RT, SPR}},
SPR              5397 arch/powerpc/xmon/ppc-opc.c {"mfspr",	X(31,339),	X_MASK,	     COM,	0,		{RT, SPR}},
SPR              5534 arch/powerpc/xmon/ppc-opc.c {"mtdcr",	X(31,451), X_MASK, PPC403|BOOKE|PPCA2|PPC476, E500|TITAN, {SPR, RS}},
SPR              5535 arch/powerpc/xmon/ppc-opc.c {"mtdcr.",	XRC(31,451,1), X_MASK,	     PPCA2,	0,		{SPR, RS}},
SPR              5717 arch/powerpc/xmon/ppc-opc.c {"mtspr",	X(31,467),	X_MASK,	     COM,	0,		{SPR, RS}},
SPR               138 arch/powerpc/xmon/spu-insns.h APUOP(M_MFSPR,		RR,	0x00c,	"mfspr",	_A2(A_T,A_S),	00002,	SPR)	/* MFSPR         RT<-SA */
SPR               139 arch/powerpc/xmon/spu-insns.h APUOP(M_RDCH,		RR,	0x00d,	"rdch",		_A2(A_T,A_H),	00002,	SPR)	/* ReaDCHannel   RT<-CA:data */
SPR               140 arch/powerpc/xmon/spu-insns.h APUOP(M_RCHCNT,		RR,	0x00f,	"rchcnt",	_A2(A_T,A_H),	00002,	SPR)	/* ReaDCHanCouNT RT<-CA:count */
SPR               149 arch/powerpc/xmon/spu-insns.h APUOP(M_MTSPR,		RR,	0x10c,	"mtspr",	_A2(A_S,A_T),	00001,	SPR)	/* MTSPR         SA<-RT */
SPR               150 arch/powerpc/xmon/spu-insns.h APUOP(M_WRCH,		RR,	0x10d,	"wrch",		_A2(A_H,A_T),	00001,	SPR)	/* ChanWRite     CA<-RT */
SPR               324 arch/powerpc/xmon/spu-insns.h APUOP(M_SYSCALL,	RI7,    0x10c,	"syscall",      _A3(A_T,A_A,A_S7N),	00002,	SPR)        /* System Call */
SPR                78 drivers/net/wireless/admtek/adm8211.c 	u32 reg = ADM8211_CSR_READ(SPR);
SPR               100 drivers/net/wireless/admtek/adm8211.c 	ADM8211_CSR_WRITE(SPR, reg);
SPR               101 drivers/net/wireless/admtek/adm8211.c 	ADM8211_CSR_READ(SPR);		/* eeprom_delay */
SPR                34 drivers/net/wireless/admtek/adm8211.h 	__le32 SPR;		/* 0x48 CSR9 */
SPR               740 drivers/video/fbdev/imsttfb.c 	write_reg_le32(par->dc_regs, SPR, pitch);
SPR               923 drivers/video/fbdev/tridentfb.c 			tmp = read3X4(par, SPR) & 0x0F;