SPLL_REF_DIV_MASK 5274 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	spll_func_cntl &= ~(SPLL_PDIV_A_MASK | SPLL_REF_DIV_MASK);
SPLL_REF_DIV_MASK 2029 drivers/gpu/drm/radeon/ni_dpm.c 	spll_func_cntl &= ~(SPLL_PDIV_A_MASK | SPLL_REF_DIV_MASK);
SPLL_REF_DIV_MASK  990 drivers/gpu/drm/radeon/rs780_dpm.c 	u32 ref_div = ((func_cntl & SPLL_REF_DIV_MASK) >> SPLL_REF_DIV_SHIFT) + 1;
SPLL_REF_DIV_MASK 1012 drivers/gpu/drm/radeon/rs780_dpm.c 	u32 ref_div = ((func_cntl & SPLL_REF_DIV_MASK) >> SPLL_REF_DIV_SHIFT) + 1;
SPLL_REF_DIV_MASK   78 drivers/gpu/drm/radeon/rv730_dpm.c 	spll_func_cntl &= ~(SPLL_HILEN_MASK | SPLL_LOLEN_MASK | SPLL_REF_DIV_MASK);
SPLL_REF_DIV_MASK  147 drivers/gpu/drm/radeon/rv740_dpm.c 	spll_func_cntl &= ~(SPLL_PDIV_A_MASK | SPLL_REF_DIV_MASK);
SPLL_REF_DIV_MASK  525 drivers/gpu/drm/radeon/rv770_dpm.c 	spll_func_cntl &= ~(SPLL_HILEN_MASK | SPLL_LOLEN_MASK | SPLL_REF_DIV_MASK);
SPLL_REF_DIV_MASK 4812 drivers/gpu/drm/radeon/si_dpm.c 	spll_func_cntl &= ~(SPLL_PDIV_A_MASK | SPLL_REF_DIV_MASK);