SPA_CTRL_CIPH_MODE_IDX   98 drivers/crypto/picoxcell_crypto_regs.h #define SPA_CTRL_CIPH_MODE_NULL		(0x00 << SPA_CTRL_CIPH_MODE_IDX)
SPA_CTRL_CIPH_MODE_IDX   99 drivers/crypto/picoxcell_crypto_regs.h #define SPA_CTRL_CIPH_MODE_ECB		(0x00 << SPA_CTRL_CIPH_MODE_IDX)
SPA_CTRL_CIPH_MODE_IDX  100 drivers/crypto/picoxcell_crypto_regs.h #define SPA_CTRL_CIPH_MODE_CBC		(0x01 << SPA_CTRL_CIPH_MODE_IDX)
SPA_CTRL_CIPH_MODE_IDX  101 drivers/crypto/picoxcell_crypto_regs.h #define SPA_CTRL_CIPH_MODE_CTR		(0x02 << SPA_CTRL_CIPH_MODE_IDX)
SPA_CTRL_CIPH_MODE_IDX  102 drivers/crypto/picoxcell_crypto_regs.h #define SPA_CTRL_CIPH_MODE_CCM		(0x03 << SPA_CTRL_CIPH_MODE_IDX)
SPA_CTRL_CIPH_MODE_IDX  103 drivers/crypto/picoxcell_crypto_regs.h #define SPA_CTRL_CIPH_MODE_GCM		(0x05 << SPA_CTRL_CIPH_MODE_IDX)
SPA_CTRL_CIPH_MODE_IDX  104 drivers/crypto/picoxcell_crypto_regs.h #define SPA_CTRL_CIPH_MODE_OFB		(0x07 << SPA_CTRL_CIPH_MODE_IDX)
SPA_CTRL_CIPH_MODE_IDX  105 drivers/crypto/picoxcell_crypto_regs.h #define SPA_CTRL_CIPH_MODE_CFB		(0x08 << SPA_CTRL_CIPH_MODE_IDX)
SPA_CTRL_CIPH_MODE_IDX  106 drivers/crypto/picoxcell_crypto_regs.h #define SPA_CTRL_CIPH_MODE_F8		(0x09 << SPA_CTRL_CIPH_MODE_IDX)