SOUTH_DSPCLK_GATE_D 4440 drivers/gpu/drm/i915/display/intel_display_power.c 		val = I915_READ(SOUTH_DSPCLK_GATE_D);
SOUTH_DSPCLK_GATE_D 4442 drivers/gpu/drm/i915/display/intel_display_power.c 		I915_WRITE(SOUTH_DSPCLK_GATE_D, val);
SOUTH_DSPCLK_GATE_D 4459 drivers/gpu/drm/i915/display/intel_display_power.c 		val = I915_READ(SOUTH_DSPCLK_GATE_D);
SOUTH_DSPCLK_GATE_D 4461 drivers/gpu/drm/i915/display/intel_display_power.c 		I915_WRITE(SOUTH_DSPCLK_GATE_D, val);
SOUTH_DSPCLK_GATE_D  169 drivers/gpu/drm/i915/display/intel_gmbus.c 	val = I915_READ(SOUTH_DSPCLK_GATE_D);
SOUTH_DSPCLK_GATE_D  174 drivers/gpu/drm/i915/display/intel_gmbus.c 	I915_WRITE(SOUTH_DSPCLK_GATE_D, val);
SOUTH_DSPCLK_GATE_D 2320 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_D(SOUTH_DSPCLK_GATE_D, D_ALL);
SOUTH_DSPCLK_GATE_D 8889 drivers/gpu/drm/i915/intel_pm.c 	I915_WRITE(SOUTH_DSPCLK_GATE_D, PCH_DPLSUNIT_CLOCK_GATE_DISABLE);
SOUTH_DSPCLK_GATE_D 8987 drivers/gpu/drm/i915/intel_pm.c 	I915_WRITE(SOUTH_DSPCLK_GATE_D, PCH_DPLSUNIT_CLOCK_GATE_DISABLE |
SOUTH_DSPCLK_GATE_D 9142 drivers/gpu/drm/i915/intel_pm.c 		I915_WRITE(SOUTH_DSPCLK_GATE_D,
SOUTH_DSPCLK_GATE_D 9143 drivers/gpu/drm/i915/intel_pm.c 			   I915_READ(SOUTH_DSPCLK_GATE_D) |
SOUTH_DSPCLK_GATE_D 9155 drivers/gpu/drm/i915/intel_pm.c 		u32 val = I915_READ(SOUTH_DSPCLK_GATE_D);
SOUTH_DSPCLK_GATE_D 9158 drivers/gpu/drm/i915/intel_pm.c 		I915_WRITE(SOUTH_DSPCLK_GATE_D, val);
SOUTH_DSPCLK_GATE_D 9216 drivers/gpu/drm/i915/intel_pm.c 	I915_WRITE(SOUTH_DSPCLK_GATE_D, I915_READ(SOUTH_DSPCLK_GATE_D) |