SNB_DRAM_ANY      611 arch/x86/events/intel/core.c #define SNB_L3_MISS		(SNB_DRAM_ANY|SNB_NON_DRAM)
SNB_DRAM_ANY      634 arch/x86/events/intel/core.c 		[ C(RESULT_ACCESS) ] = SNB_DMND_READ|SNB_DRAM_ANY,
SNB_DRAM_ANY      638 arch/x86/events/intel/core.c 		[ C(RESULT_ACCESS) ] = SNB_DMND_WRITE|SNB_DRAM_ANY,
SNB_DRAM_ANY      642 arch/x86/events/intel/core.c 		[ C(RESULT_ACCESS) ] = SNB_DMND_PREFETCH|SNB_DRAM_ANY,