SMU__NUM_SCLK_DPM_STATE 2876 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 	if (current_index >= SMU__NUM_SCLK_DPM_STATE) {
SMU__NUM_SCLK_DPM_STATE 3297 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		if (pl_index < SMU__NUM_SCLK_DPM_STATE) {
SMU__NUM_SCLK_DPM_STATE  157 drivers/gpu/drm/amd/amdgpu/kv_dpm.h 	SMU7_Fusion_GraphicsLevel graphics_level[SMU__NUM_SCLK_DPM_STATE];
SMU__NUM_SCLK_DPM_STATE   41 drivers/gpu/drm/amd/powerplay/inc/smu7.h #define SMU7_MAX_LEVELS_GRAPHICS        SMU__NUM_SCLK_DPM_STATE   // SCLK + SQ DPM + ULV
SMU__NUM_SCLK_DPM_STATE   61 drivers/gpu/drm/amd/powerplay/inc/smu71.h #define SMU71_MAX_LEVELS_GRAPHICS        SMU__NUM_SCLK_DPM_STATE
SMU__NUM_SCLK_DPM_STATE  179 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     SMU71_Discrete_MCArbDramTimingTableEntry entries[SMU__NUM_SCLK_DPM_STATE][SMU__NUM_MCLK_DPM_LEVELS];
SMU__NUM_SCLK_DPM_STATE  109 drivers/gpu/drm/amd/powerplay/inc/smu72.h #define SMU72_MAX_LEVELS_GRAPHICS        SMU__NUM_SCLK_DPM_STATE   /* SCLK + SQ DPM + ULV */
SMU__NUM_SCLK_DPM_STATE  166 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	SMU72_Discrete_MCArbDramTimingTableEntry entries[SMU__NUM_SCLK_DPM_STATE][SMU__NUM_MCLK_DPM_LEVELS];
SMU__NUM_SCLK_DPM_STATE  108 drivers/gpu/drm/amd/powerplay/inc/smu73.h #define SMU73_MAX_LEVELS_GRAPHICS        SMU__NUM_SCLK_DPM_STATE   // SCLK + SQ DPM + ULV
SMU__NUM_SCLK_DPM_STATE  156 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     SMU73_Discrete_MCArbDramTimingTableEntry entries[SMU__NUM_SCLK_DPM_STATE][SMU__NUM_MCLK_DPM_LEVELS];
SMU__NUM_SCLK_DPM_STATE  134 drivers/gpu/drm/amd/powerplay/inc/smu74.h #define SMU74_MAX_LEVELS_GRAPHICS        SMU__NUM_SCLK_DPM_STATE   /* SCLK + SQ DPM + ULV */
SMU__NUM_SCLK_DPM_STATE  179 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	SMU74_Discrete_MCArbDramTimingTableEntry entries[SMU__NUM_SCLK_DPM_STATE][SMU__NUM_MCLK_DPM_LEVELS];
SMU__NUM_SCLK_DPM_STATE   55 drivers/gpu/drm/amd/powerplay/inc/smu75.h #define SMU75_MAX_LEVELS_GRAPHICS        SMU__NUM_SCLK_DPM_STATE
SMU__NUM_SCLK_DPM_STATE  192 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	SMU75_Discrete_MCArbDramTimingTableEntry entries[SMU__NUM_SCLK_DPM_STATE][SMU__NUM_MCLK_DPM_LEVELS];
SMU__NUM_SCLK_DPM_STATE  235 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     SMU7_Discrete_MCArbDramTimingTableEntry entries[SMU__NUM_SCLK_DPM_STATE][SMU__NUM_MCLK_DPM_LEVELS];
SMU__NUM_SCLK_DPM_STATE  233 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     SMU7_Fusion_GraphicsLevel         GraphicsLevel           [SMU__NUM_SCLK_DPM_STATE];
SMU__NUM_SCLK_DPM_STATE 2812 drivers/gpu/drm/radeon/kv_dpm.c 	if (current_index >= SMU__NUM_SCLK_DPM_STATE) {
SMU__NUM_SCLK_DPM_STATE 2834 drivers/gpu/drm/radeon/kv_dpm.c 	if (current_index >= SMU__NUM_SCLK_DPM_STATE) {
SMU__NUM_SCLK_DPM_STATE  131 drivers/gpu/drm/radeon/kv_dpm.h 	SMU7_Fusion_GraphicsLevel graphics_level[SMU__NUM_SCLK_DPM_STATE];
SMU__NUM_SCLK_DPM_STATE   41 drivers/gpu/drm/radeon/smu7.h #define SMU7_MAX_LEVELS_GRAPHICS        SMU__NUM_SCLK_DPM_STATE   // SCLK + SQ DPM + ULV
SMU__NUM_SCLK_DPM_STATE  235 drivers/gpu/drm/radeon/smu7_discrete.h     SMU7_Discrete_MCArbDramTimingTableEntry entries[SMU__NUM_SCLK_DPM_STATE][SMU__NUM_MCLK_DPM_LEVELS];
SMU__NUM_SCLK_DPM_STATE  233 drivers/gpu/drm/radeon/smu7_fusion.h     SMU7_Fusion_GraphicsLevel         GraphicsLevel           [SMU__NUM_SCLK_DPM_STATE];