SMU__NUM_PCIE_DPM_LEVELS 44 drivers/gpu/drm/amd/powerplay/inc/smu7.h #define SMU7_MAX_LEVELS_LINK SMU__NUM_PCIE_DPM_LEVELS // PCIe speed and number of lanes. SMU__NUM_PCIE_DPM_LEVELS 64 drivers/gpu/drm/amd/powerplay/inc/smu71.h #define SMU71_MAX_LEVELS_LINK SMU__NUM_PCIE_DPM_LEVELS SMU__NUM_PCIE_DPM_LEVELS 112 drivers/gpu/drm/amd/powerplay/inc/smu72.h #define SMU72_MAX_LEVELS_LINK SMU__NUM_PCIE_DPM_LEVELS /* PCIe speed and number of lanes. */ SMU__NUM_PCIE_DPM_LEVELS 111 drivers/gpu/drm/amd/powerplay/inc/smu73.h #define SMU73_MAX_LEVELS_LINK SMU__NUM_PCIE_DPM_LEVELS // PCIe speed and number of lanes. SMU__NUM_PCIE_DPM_LEVELS 137 drivers/gpu/drm/amd/powerplay/inc/smu74.h #define SMU74_MAX_LEVELS_LINK SMU__NUM_PCIE_DPM_LEVELS /* PCIe speed and number of lanes */ SMU__NUM_PCIE_DPM_LEVELS 58 drivers/gpu/drm/amd/powerplay/inc/smu75.h #define SMU75_MAX_LEVELS_LINK SMU__NUM_PCIE_DPM_LEVELS SMU__NUM_PCIE_DPM_LEVELS 44 drivers/gpu/drm/radeon/smu7.h #define SMU7_MAX_LEVELS_LINK SMU__NUM_PCIE_DPM_LEVELS // PCIe speed and number of lanes.