SMU7_Discrete_GraphicsLevel  132 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h typedef struct SMU7_Discrete_GraphicsLevel SMU7_Discrete_GraphicsLevel;
SMU7_Discrete_GraphicsLevel  323 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     SMU7_Discrete_GraphicsLevel         GraphicsLevel           [SMU7_MAX_LEVELS_GRAPHICS];
SMU7_Discrete_GraphicsLevel  296 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 		uint32_t clock, struct SMU7_Discrete_GraphicsLevel *sclk)
SMU7_Discrete_GraphicsLevel  407 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 		uint32_t clock, struct SMU7_Discrete_GraphicsLevel *level)
SMU7_Discrete_GraphicsLevel  478 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	uint32_t array_size = sizeof(struct SMU7_Discrete_GraphicsLevel) *
SMU7_Discrete_GraphicsLevel  480 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	struct SMU7_Discrete_GraphicsLevel *levels =
SMU7_Discrete_GraphicsLevel 2764 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	struct SMU7_Discrete_GraphicsLevel *levels =
SMU7_Discrete_GraphicsLevel 2789 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 				clk_activity_offset = array + (sizeof(SMU7_Discrete_GraphicsLevel) * i)
SMU7_Discrete_GraphicsLevel 2790 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 						+ offsetof(SMU7_Discrete_GraphicsLevel, ActivityLevel);
SMU7_Discrete_GraphicsLevel 2801 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 				up_hyst_offset = array + (sizeof(SMU7_Discrete_GraphicsLevel) * i)
SMU7_Discrete_GraphicsLevel 2802 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 						+ offsetof(SMU7_Discrete_GraphicsLevel, UpH);
SMU7_Discrete_GraphicsLevel 2803 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 				down_hyst_offset = array + (sizeof(SMU7_Discrete_GraphicsLevel) * i)
SMU7_Discrete_GraphicsLevel 2804 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 						+ offsetof(SMU7_Discrete_GraphicsLevel, DownH);
SMU7_Discrete_GraphicsLevel 3161 drivers/gpu/drm/radeon/ci_dpm.c 				    SMU7_Discrete_GraphicsLevel *sclk)
SMU7_Discrete_GraphicsLevel 3218 drivers/gpu/drm/radeon/ci_dpm.c 					    SMU7_Discrete_GraphicsLevel *graphic_level)
SMU7_Discrete_GraphicsLevel 3282 drivers/gpu/drm/radeon/ci_dpm.c 	u32 level_array_size = sizeof(SMU7_Discrete_GraphicsLevel) *
SMU7_Discrete_GraphicsLevel 3284 drivers/gpu/drm/radeon/ci_dpm.c 	SMU7_Discrete_GraphicsLevel *levels = pi->smc_state_table.GraphicsLevel;
SMU7_Discrete_GraphicsLevel  132 drivers/gpu/drm/radeon/smu7_discrete.h typedef struct SMU7_Discrete_GraphicsLevel SMU7_Discrete_GraphicsLevel;
SMU7_Discrete_GraphicsLevel  322 drivers/gpu/drm/radeon/smu7_discrete.h     SMU7_Discrete_GraphicsLevel         GraphicsLevel           [SMU7_MAX_LEVELS_GRAPHICS];