SMU74_Discrete_GraphicsLevel  103 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h typedef struct SMU74_Discrete_GraphicsLevel SMU74_Discrete_GraphicsLevel;
SMU74_Discrete_GraphicsLevel  281 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	SMU74_Discrete_GraphicsLevel        GraphicsLevel[SMU74_MAX_LEVELS_GRAPHICS];
SMU74_Discrete_GraphicsLevel   80 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c static const SMU74_Discrete_GraphicsLevel avfs_graphics_level_polaris10[8] = {
SMU74_Discrete_GraphicsLevel  907 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 		uint32_t clock, struct SMU74_Discrete_GraphicsLevel *level)
SMU74_Discrete_GraphicsLevel  989 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	uint32_t array_size = sizeof(struct SMU74_Discrete_GraphicsLevel) *
SMU74_Discrete_GraphicsLevel  991 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	struct SMU74_Discrete_GraphicsLevel *levels =
SMU74_Discrete_GraphicsLevel 2469 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	struct SMU74_Discrete_GraphicsLevel *levels =
SMU74_Discrete_GraphicsLevel 2494 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 				clk_activity_offset = array + (sizeof(SMU74_Discrete_GraphicsLevel) * i)
SMU74_Discrete_GraphicsLevel 2495 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 						+ offsetof(SMU74_Discrete_GraphicsLevel, ActivityLevel);
SMU74_Discrete_GraphicsLevel 2506 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 				up_hyst_offset = array + (sizeof(SMU74_Discrete_GraphicsLevel) * i)
SMU74_Discrete_GraphicsLevel 2507 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 						+ offsetof(SMU74_Discrete_GraphicsLevel, UpHyst);
SMU74_Discrete_GraphicsLevel 2508 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 				down_hyst_offset = array + (sizeof(SMU74_Discrete_GraphicsLevel) * i)
SMU74_Discrete_GraphicsLevel 2509 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 						+ offsetof(SMU74_Discrete_GraphicsLevel, DownHyst);