SMU74_Discrete_DpmTable  372 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h typedef struct SMU74_Discrete_DpmTable SMU74_Discrete_DpmTable;
SMU74_Discrete_DpmTable  139 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	vr_config_address = dpm_table_start + offsetof(SMU74_Discrete_DpmTable, VRConfig);
SMU74_Discrete_DpmTable  146 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	graphics_level_address = dpm_table_start + offsetof(SMU74_Discrete_DpmTable, GraphicsLevel);
SMU74_Discrete_DpmTable  154 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	graphics_level_address = dpm_table_start + offsetof(SMU74_Discrete_DpmTable, MemoryLevel);
SMU74_Discrete_DpmTable  163 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	graphics_level_address = dpm_table_start + offsetof(SMU74_Discrete_DpmTable, BootMVdd);
SMU74_Discrete_DpmTable  429 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	SMU74_Discrete_DpmTable  *table = &(smu_data->smc_state_table);
SMU74_Discrete_DpmTable  647 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 			SMU74_Discrete_DpmTable *table)
SMU74_Discrete_DpmTable  674 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 					struct SMU74_Discrete_DpmTable *table)
SMU74_Discrete_DpmTable  699 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 		struct SMU74_Discrete_DpmTable *table)
SMU74_Discrete_DpmTable  725 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 		struct SMU74_Discrete_DpmTable *table)
SMU74_Discrete_DpmTable  761 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 		struct SMU74_Discrete_DpmTable *table)
SMU74_Discrete_DpmTable  767 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 		struct SMU74_Discrete_DpmTable *table)
SMU74_Discrete_DpmTable  799 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 				   SMU74_Discrete_DpmTable  *table)
SMU74_Discrete_DpmTable  845 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	const SMU74_Discrete_DpmTable *table = &(smu_data->smc_state_table);
SMU74_Discrete_DpmTable  988 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 			offsetof(SMU74_Discrete_DpmTable, GraphicsLevel);
SMU74_Discrete_DpmTable 1132 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 			offsetof(SMU74_Discrete_DpmTable, MemoryLevel);
SMU74_Discrete_DpmTable 1200 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 		SMU74_Discrete_DpmTable *table)
SMU74_Discrete_DpmTable 1287 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 		SMU74_Discrete_DpmTable *table)
SMU74_Discrete_DpmTable 1393 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 		struct SMU74_Discrete_DpmTable *table)
SMU74_Discrete_DpmTable 1450 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 		struct SMU74_Discrete_DpmTable *table)
SMU74_Discrete_DpmTable 1596 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 		struct SMU74_Discrete_DpmTable *table)
SMU74_Discrete_DpmTable 1646 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	SMU74_Discrete_DpmTable  *table = &(smu_data->smc_state_table);
SMU74_Discrete_DpmTable 1828 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	struct SMU74_Discrete_DpmTable *table = &(smu_data->smc_state_table);
SMU74_Discrete_DpmTable 2015 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 			offsetof(SMU74_Discrete_DpmTable, SystemFlags),
SMU74_Discrete_DpmTable 2017 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 			sizeof(SMU74_Discrete_DpmTable) - 3 * sizeof(SMU74_PIDController),
SMU74_Discrete_DpmTable 2188 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	mm_boot_level_offset = smu_data->smu7_data.dpm_table_start + offsetof(SMU74_Discrete_DpmTable,
SMU74_Discrete_DpmTable 2224 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 					offsetof(SMU74_Discrete_DpmTable, VceBootLevel);
SMU74_Discrete_DpmTable 2294 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 				offsetof(SMU74_Discrete_DpmTable,
SMU74_Discrete_DpmTable 2345 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 			return offsetof(SMU74_Discrete_DpmTable, UvdBootLevel);
SMU74_Discrete_DpmTable 2347 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 			return offsetof(SMU74_Discrete_DpmTable, VceBootLevel);
SMU74_Discrete_DpmTable 2349 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 			return offsetof(SMU74_Discrete_DpmTable, LowSclkInterruptThreshold);
SMU74_Discrete_DpmTable 2472 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 			offsetof(SMU74_Discrete_DpmTable, GraphicsLevel);
SMU74_Discrete_DpmTable 2475 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 			offsetof(SMU74_Discrete_DpmTable, MemoryLevel);
SMU74_Discrete_DpmTable   57 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.h 	SMU74_Discrete_DpmTable              smc_state_table;