SMU73_Discrete_DpmTable  367 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h typedef struct SMU73_Discrete_DpmTable SMU73_Discrete_DpmTable;
SMU73_Discrete_DpmTable  243 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 			offsetof(SMU73_Discrete_DpmTable, VRConfig);
SMU73_Discrete_DpmTable  251 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	level_addr = table_start + offsetof(SMU73_Discrete_DpmTable, GraphicsLevel);
SMU73_Discrete_DpmTable  492 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	SMU73_Discrete_DpmTable  *dpm_table = &(smu_data->smc_state_table);
SMU73_Discrete_DpmTable  757 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 		struct SMU73_Discrete_DpmTable *table)
SMU73_Discrete_DpmTable  785 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 		struct SMU73_Discrete_DpmTable *table)
SMU73_Discrete_DpmTable  823 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 		struct SMU73_Discrete_DpmTable *table)
SMU73_Discrete_DpmTable  829 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 		struct SMU73_Discrete_DpmTable *table)
SMU73_Discrete_DpmTable 1015 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 			offsetof(SMU73_Discrete_DpmTable, GraphicsLevel);
SMU73_Discrete_DpmTable 1231 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 			offsetof(SMU73_Discrete_DpmTable, MemoryLevel);
SMU73_Discrete_DpmTable 1301 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 		SMU73_Discrete_DpmTable *table)
SMU73_Discrete_DpmTable 1423 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 		SMU73_Discrete_DpmTable *table)
SMU73_Discrete_DpmTable 1462 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 		SMU73_Discrete_DpmTable *table)
SMU73_Discrete_DpmTable 1559 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 		struct SMU73_Discrete_DpmTable *table)
SMU73_Discrete_DpmTable 1606 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 		struct SMU73_Discrete_DpmTable *table)
SMU73_Discrete_DpmTable 1824 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 		struct SMU73_Discrete_DpmTable *table)
SMU73_Discrete_DpmTable 1930 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	struct SMU73_Discrete_DpmTable *table = &(smu_data->smc_state_table);
SMU73_Discrete_DpmTable 2111 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 			offsetof(SMU73_Discrete_DpmTable, SystemFlags),
SMU73_Discrete_DpmTable 2113 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 			sizeof(SMU73_Discrete_DpmTable) - 3 * sizeof(SMU73_PIDController),
SMU73_Discrete_DpmTable 2283 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 				offsetof(SMU73_Discrete_DpmTable,
SMU73_Discrete_DpmTable 2330 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 			return offsetof(SMU73_Discrete_DpmTable, UvdBootLevel);
SMU73_Discrete_DpmTable 2332 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 			return offsetof(SMU73_Discrete_DpmTable, VceBootLevel);
SMU73_Discrete_DpmTable 2334 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 			return offsetof(SMU73_Discrete_DpmTable, LowSclkInterruptThreshold);
SMU73_Discrete_DpmTable 2379 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	mm_boot_level_offset = smu_data->smu7_data.dpm_table_start + offsetof(SMU73_Discrete_DpmTable,
SMU73_Discrete_DpmTable 2415 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 					offsetof(SMU73_Discrete_DpmTable, VceBootLevel);
SMU73_Discrete_DpmTable 2559 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 			offsetof(SMU73_Discrete_DpmTable, GraphicsLevel);
SMU73_Discrete_DpmTable 2562 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 			offsetof(SMU73_Discrete_DpmTable, MemoryLevel);
SMU73_Discrete_DpmTable   42 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.h 	struct SMU73_Discrete_DpmTable       smc_state_table;