SMU72_Discrete_GraphicsLevel   72 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h typedef struct SMU72_Discrete_GraphicsLevel SMU72_Discrete_GraphicsLevel;
SMU72_Discrete_GraphicsLevel  265 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	SMU72_Discrete_GraphicsLevel        GraphicsLevel[SMU72_MAX_LEVELS_GRAPHICS];
SMU72_Discrete_GraphicsLevel  539 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 		uint32_t engine_clock, SMU72_Discrete_GraphicsLevel *sclk)
SMU72_Discrete_GraphicsLevel  618 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 				SMU72_Discrete_GraphicsLevel *graphic_level)
SMU72_Discrete_GraphicsLevel  697 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	uint32_t level_array_size = sizeof(SMU72_Discrete_GraphicsLevel) *
SMU72_Discrete_GraphicsLevel  700 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	SMU72_Discrete_GraphicsLevel *levels = smu_data->smc_state_table.GraphicsLevel;
SMU72_Discrete_GraphicsLevel 3152 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	struct SMU72_Discrete_GraphicsLevel *levels =
SMU72_Discrete_GraphicsLevel 3177 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 				clk_activity_offset = array + (sizeof(SMU72_Discrete_GraphicsLevel) * i)
SMU72_Discrete_GraphicsLevel 3178 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 						+ offsetof(SMU72_Discrete_GraphicsLevel, ActivityLevel);
SMU72_Discrete_GraphicsLevel 3189 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 				up_hyst_offset = array + (sizeof(SMU72_Discrete_GraphicsLevel) * i)
SMU72_Discrete_GraphicsLevel 3190 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 						+ offsetof(SMU72_Discrete_GraphicsLevel, UpHyst);
SMU72_Discrete_GraphicsLevel 3191 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 				down_hyst_offset = array + (sizeof(SMU72_Discrete_GraphicsLevel) * i)
SMU72_Discrete_GraphicsLevel 3192 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 						+ offsetof(SMU72_Discrete_GraphicsLevel, DownHyst);