SMU71_Discrete_DpmTable  344 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h typedef struct SMU71_Discrete_DpmTable SMU71_Discrete_DpmTable;
SMU71_Discrete_DpmTable  618 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 			SMU71_Discrete_DpmTable *table)
SMU71_Discrete_DpmTable  644 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 			SMU71_Discrete_DpmTable *table)
SMU71_Discrete_DpmTable  669 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 			SMU71_Discrete_DpmTable *table)
SMU71_Discrete_DpmTable  695 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	SMU71_Discrete_DpmTable *table)
SMU71_Discrete_DpmTable  764 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c static int iceland_populate_smc_link_level(struct pp_hwmgr *hwmgr, SMU71_Discrete_DpmTable *table)
SMU71_Discrete_DpmTable  965 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 				offsetof(SMU71_Discrete_DpmTable, GraphicsLevel);
SMU71_Discrete_DpmTable 1354 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	uint32_t level_array_adress = smu_data->smu7_data.dpm_table_start + offsetof(SMU71_Discrete_DpmTable, MemoryLevel);
SMU71_Discrete_DpmTable 1423 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	SMU71_Discrete_DpmTable *table)
SMU71_Discrete_DpmTable 1565 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 					SMU71_Discrete_DpmTable *table)
SMU71_Discrete_DpmTable 1571 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 		SMU71_Discrete_DpmTable *table)
SMU71_Discrete_DpmTable 1577 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 		SMU71_Discrete_DpmTable *table)
SMU71_Discrete_DpmTable 1648 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 			SMU71_Discrete_DpmTable *table)
SMU71_Discrete_DpmTable 1854 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	SMU71_Discrete_DpmTable  *dpm_table = &(smu_data->smc_state_table);
SMU71_Discrete_DpmTable 1908 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 					    SMU71_Discrete_DpmTable *tab)
SMU71_Discrete_DpmTable 1934 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	SMU71_Discrete_DpmTable  *table = &(smu_data->smc_state_table);
SMU71_Discrete_DpmTable 2058 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 										offsetof(SMU71_Discrete_DpmTable, SystemFlags),
SMU71_Discrete_DpmTable 2060 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 										sizeof(SMU71_Discrete_DpmTable)-3 * sizeof(SMU71_PIDController),
SMU71_Discrete_DpmTable 2193 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 				offsetof(SMU71_Discrete_DpmTable,
SMU71_Discrete_DpmTable 2246 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 			return offsetof(SMU71_Discrete_DpmTable, LowSclkInterruptThreshold);
SMU71_Discrete_DpmTable   62 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.h 	struct SMU71_Discrete_DpmTable       smc_state_table;