SMMU_PMCG_INTENCLR0 188 drivers/perf/arm_smmuv3_pmu.c writeq(BIT(idx), smmu_pmu->reg_base + SMMU_PMCG_INTENCLR0); SMMU_PMCG_INTENCLR0 706 drivers/perf/arm_smmuv3_pmu.c smmu_pmu->reg_base + SMMU_PMCG_INTENCLR0);